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target/xtensa: add clock input to xtensa CPU
2022-05-06 Max Filippovtarget/xtensa: add clock input to xtensa CPU
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Simon Safartarget/xtensa: import core lx106
Reviewed-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_constant_* for remaining opcodes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_constant_* for FPU conversion...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_constant_* for numbered special...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_constant_* for TLB opcodes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_constant_* for exceptions
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: use tcg_contatnt_* for numeric literals
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2022-05-06 Max Filippovtarget/xtensa: fix missing tcg_temp_free in gen_window_check
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2021-05-20 Max Filippovtarget/xtensa: clean up unaligned access
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2021-05-20 Max Filippovtarget/xtensa: fix access ring in l32ex
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2021-05-20 Max Filippovtarget/xtensa: don't generate extra EXCP_DEBUG on exception
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2021-04-03 Max Filippovtarget/xtensa: make xtensa_modules static on import
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2021-04-03 Max Filippovtarget/xtensa: fix meson.build rule for xtensa cores
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: import DSP3400 core
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: import de233_fpu core
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: add DFP0 arithmetic tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: test double precision load/store
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: add fp0 div and sqrt tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: update test_lsc for DFPU
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: update test_fp1 for DFPU
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: update test_fp0_conv for DFPU
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: expand madd tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: update test_fp0_arith for DFPU
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtests/tcg/xtensa: fix test execution on ISS
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: implement FPU division and square root
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: add DFPU registers and opcodes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: add DFPU option
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: don't access BR regfile directly
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: move FSR/FCR register accessors
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: rename FPU2000 translators and helpers
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: support copying registers up to 64 bits...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: add geometry to xtensa_get_regfile_by_name
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovsoftfloat: add xtensa specialization for pickNaNMulAdd
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovsoftfloat: pass float_status pointer to pickNaN
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovsoftfloat: make NO_SIGNALING_NANS runtime property
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: implement NMI support
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-08-21 Max Filippovtarget/xtensa: make opcode properties more dynamic
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-06-22 Max Filippovtarget/xtensa: drop gen_io_end call
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-05-17 Max Filippovtarget/xtensa: fix simcall for newer hardware
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-05-17 Max Filippovtarget/xtensa: fetch HW version from configuration...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-04-30 Max Filippovtarget/xtensa: work around missing SR definitions
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-04-07 Max Filippovtarget/xtensa: statically allocate xtensa_insnbufs...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-04-07 Max Filippovtarget/xtensa: fix pasto in pfwait.r opcode name
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-01-06 Max Filippovtarget/xtensa: use MPU background map from core configuration
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-01-06 Max Filippovtarget/xtensa: import xtensa/config/core-isa.h
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2020-01-06 Max Filippovtarget/xtensa: fix ps.ring use in MPU configs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-10-19 Max Filippovhw/xtensa: add virt machine
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-10-19 Max Filippovtarget/xtensa: regenerate and re-import test_mmuhifi_c3...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-15 Max Filippovtarget/xtensa: implement exclusive access option
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-15 Max Filippovtarget/xtensa: update list of exception causes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-15 Max Filippovtarget/xtensa: implement block prefetch option opcodes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-14 Max Filippovtarget/xtensa: implement DIWBUI.P opcode
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-10 Max Filippovtarget/xtensa: implement MPU option
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-10 Max Filippovtarget/xtensa: add parity/ECC option SRs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-10 Max Filippovtarget/xtensa: define IDMA and gather/scatter IRQ types
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-10 Max Filippovtarget/xtensa: make internal MMU functions static
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-05-10 Max Filippovtarget/xtensa: get rid of centralized SR properties
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-03-23 Max Filippovtests/tcg/xtensa: clean up test set
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-03-23 Max Filippovtarget/xtensa: don't announce exit simcall
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-03-22 Max Filippovtarget/xtensa: fix break_dependency for repeated resources
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add FPU2000 coprocessor tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add FP1 group tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add FP0 group conversion tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add FP0 group arithmetic tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add LSCI/LSCX group tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add test for FLIX
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize MMU-related tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize windowed register...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize and fix s32c1i tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: fix SR tests for big endian configs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize and expand SR tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize timer/CCOUNT tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize interrupt tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: add straightforward conditionals
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize cache option tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: conditionalize debug option tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: enable boolean tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: fix endianness issues in test_b
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: don't use optional opcodes in generic...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: support configs with LITBASE
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: support configurations w/o vecbase
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtests/tcg/xtensa: indicate failed tests
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: implement PREFCTL SR
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: prioritize load/store in FLIX bundles
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: break circular register dependencies
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: reorganize access to boolean registers
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: reorganize access to MAC16 registers
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: reorganize register handling in translators
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: only rotate window in the retw helper
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: move WINDOW_BASE SR update to postprocessing
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: add generic instruction post-processing
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-28 Max Filippovtarget/xtensa: sort FLIX instruction opcodes
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-19 Max Filippovtarget/xtensa: implement wide branches and loops
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-19 Max Filippovtarget/xtensa: allow multiple names for single opcode
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-19 Max Filippovtarget/xtensa: don't require opcode table sorting
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-19 Max Filippovtarget/xtensa: move xtensa_finalize_config to xtensa_core_cl...
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-19 Max Filippovtarget/xtensa: fixup test_mmuhifi_c3 overlay
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-11 Max Filippovtarget/xtensa: get rid of gen_callw[i]
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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2019-02-11 Max Filippovtarget/xtensa: don't specify windowed registers manually
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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