| commit | e2314fda62c42c89f91dcf104ed3702170a90308 | |
| author | Peter Crosthwaite <peter.crosthwaite@xilinx.com> | |
| Wed, 4 Dec 2013 06:00:54 +0000 (3 22:00 -0800) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Tue, 10 Dec 2013 13:28:50 +0000 (10 13:28 +0000) | ||
| tree | 227ea40fb65a1d344b0eb2706c105b7f45b19a68 | treesnapshot (tar.gz zip) |
| parent | 191946c51f28e6ac76e94c7379d5e0f69c016e83 | commitdiff |
net/cadence_gem: Fix register w1c logic
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This write-1-clear logic was incorrect. It was always clearing w1c
bits regardless of whether the written value was 1 or not. i.e. it
was implementing a write-anything-to-clear strategy.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: ed905b04d3343966ded425f06aa2224bc7a35b59.1386136219.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| hw/net/cadence_gem.c | diffblobblamehistory |