| commit | dc7abe4d65ad39390b2db120f5ad18f8f6576f8b | |
| author | Michael Davidsaver <mdavidsaver@gmail.com> | |
| Fri, 27 Jan 2017 15:20:24 +0000 (27 15:20 +0000) | ||
| committer | Peter Maydell <peter.maydell@linaro.org> | |
| Fri, 27 Jan 2017 15:29:08 +0000 (27 15:29 +0000) | ||
| tree | 8cf0e2eecbbc978983485a362b45d55ad815cdec | treesnapshot (tar.gz zip) |
| parent | bdd04fc76a78d61ae0f0e93ce345f9cf2e49a9a8 | commitdiff |
armv7m: FAULTMASK should be 0 on reset
For M profile CPUs, FAULTMASK should be 0 on reset, like PRIMASK.
QEMU stores FAULTMASK in the PSTATE F bit, so (as with PRIMASK in the
I bit) we have to clear these to undo the A profile default of 1.
Update the comment accordingly and move it so that it's closer to the
code it's referring to.
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1485285380-10565-10-git-send-email-peter.maydell@linaro.org
[PMM: rewrote commit message, moved comments]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
For M profile CPUs, FAULTMASK should be 0 on reset, like PRIMASK.
QEMU stores FAULTMASK in the PSTATE F bit, so (as with PRIMASK in the
I bit) we have to clear these to undo the A profile default of 1.
Update the comment accordingly and move it so that it's closer to the
code it's referring to.
Signed-off-by: Michael Davidsaver <mdavidsaver@gmail.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 1485285380-10565-10-git-send-email-peter.maydell@linaro.org
[PMM: rewrote commit message, moved comments]
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
| target/arm/cpu.c | diffblobblamehistory |