char/cadence_uart: Implement Tx flow control
commit294cdac2a02d3172b69c84dec727d6ac6006bb59
authorPeter Crosthwaite <peter.crosthwaite@xilinx.com>
Mon, 6 Jan 2014 10:16:40 +0000 (6 10:16 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 7 Jan 2014 19:18:07 +0000 (7 19:18 +0000)
treec4a72fb0a8f23c45ec384e4bae6a7bd168b86d71
parenta33f37a1784691556ed6fd3f58badfce22b761ad
char/cadence_uart: Implement Tx flow control

If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).

Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Message-id: 4bea048b3ab38425701d82ccc1ab92545c26b79c.1388626249.git.peter.crosthwaite@xilinx.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/char/cadence_uart.c