| commit | 24ec52f91dfb6d26d7035093adca60d18f02074e | |
| author | Richard Henderson <richard.henderson@linaro.org> | |
| Tue, 13 Sep 2022 14:28:17 +0000 (13 15:28 +0100) | ||
| committer | Laurent Vivier <laurent@vivier.eu> | |
| Wed, 21 Sep 2022 13:01:37 +0000 (21 15:01 +0200) | ||
| tree | fc67071346a4d0d5848b63fa1038a32133e3afb5 | treesnapshot (tar.gz zip) |
| parent | 5934dae7a747f0aed24e8d20936ca5e117d95ad9 | commitdiff |
target/m68k: Fix MACSR to CCR
First, we were writing to the entire SR register, instead
of only the flags portion. Second, we were not clearing C
as per the documentation (X was cleared via the 0xf mask).
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220913142818.7802-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
First, we were writing to the entire SR register, instead
of only the flags portion. Second, we were not clearing C
as per the documentation (X was cleared via the 0xf mask).
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Laurent Vivier <laurent@vivier.eu>
Message-Id: <20220913142818.7802-2-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>
| target/m68k/translate.c | diffblobblamehistory |