| commit | 05ab8bdb813acdcd74afa71d6656c2df816cb230 | |
| author | Luca Ellero <lroluk@gmail.com> | |
| Wed, 9 Feb 2011 20:36:14 +0000 (9 20:36 +0000) | ||
| committer | Øyvind Harboe <oyvind.harboe@zylin.com> | |
| Thu, 10 Feb 2011 09:07:56 +0000 (10 10:07 +0100) | ||
| tree | 76062d8e3da6d429ff6918afdd94582515d0883e | treesnapshot (tar.gz zip) |
| parent | 94e90cbf16cb14c997e68b780b1c4397f2cc2257 | commitdiff |
cortex_a9: implement read/write memory through APB-AP
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").
To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB
NOTE: at the moment APB memory accesses are very slow, compared
to AHB accesses. Work has to be done to get it faster (for
example LDR/STR instead od LDRB/STRB)
Signed-off-by: Luca Ellero <lroluk@gmail.com>
This patch adds read/write capability to memory addresses not
accessible through AHB-AP (for example "boot ROM code").
To select AHB or APB, a "dap apsel" command must be issued:
dap apsel 0 -> following memory accesses are through AHB
dap apsel 1 -> following memory accesses are through APB
NOTE: at the moment APB memory accesses are very slow, compared
to AHB accesses. Work has to be done to get it faster (for
example LDR/STR instead od LDRB/STRB)
Signed-off-by: Luca Ellero <lroluk@gmail.com>
| src/target/cortex_a9.c | diffblobblamehistory |