From d50ce65962a40fae5bac2169e0094ae37c0e41d7 Mon Sep 17 00:00:00 2001 From: Vandra Akos Date: Sun, 27 May 2012 12:15:21 +0200 Subject: [PATCH] lpc1768.cfg pulled out constants from flash init as variables Seems like an esthetic change, but it will allow easy support for other lpc17xx devices. Change-Id: I2cb953ce1afdd82f6ca65b38d5557a28416f895e Signed-off-by: Vandra Akos Reviewed-on: http://openocd.zylin.com/674 Tested-by: jenkins Reviewed-by: Spencer Oliver --- tcl/target/lpc1768.cfg | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/tcl/target/lpc1768.cfg b/tcl/target/lpc1768.cfg index d1734ddb1..8bcab9ba5 100644 --- a/tcl/target/lpc1768.cfg +++ b/tcl/target/lpc1768.cfg @@ -22,12 +22,25 @@ if { [info exists CCLK] } { } else { set _CCLK 4000 } + if { [info exists CPUTAPID] } { set _CPUTAPID $CPUTAPID } else { set _CPUTAPID 0x4ba00477 } +if { [info exists CPURAMSIZE] } { + set _CPURAMSIZE $CPURAMSIZE +} else { + set _CPURAMSIZE 0x8000 +} + +if { [info exists CPUROMSIZE] } { + set _CPUROMSIZE $CPUROMSIZE +} else { + set _CPUROMSIZE 0x80000 +} + #delays on reset lines adapter_nsrst_delay 200 jtag_ntrst_delay 200 @@ -40,13 +53,13 @@ target create $_TARGETNAME cortex_m3 -chain-position $_TARGETNAME # LPC1768 has 32kB of SRAM In the ARMv7-M "Code" area (at 0x10000000) # and 32K more on AHB, in the ARMv7-M "SRAM" area, (at 0x2007c000). -$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size 0x8000 +$_TARGETNAME configure -work-area-phys 0x10000000 -work-area-size $_CPURAMSIZE # LPC1768 has 512kB of flash memory, managed by ROM code (including a # boot loader which verifies the flash exception table's checksum). # flash bank lpc2000 0 0 [calc checksum] set _FLASHNAME $_CHIPNAME.flash -flash bank $_FLASHNAME lpc2000 0x0 0x80000 0 0 $_TARGETNAME \ +flash bank $_FLASHNAME lpc2000 0x0 $_CPUROMSIZE 0 0 $_TARGETNAME \ lpc1700 $_CCLK calc_checksum # Run with *real slow* clock by default since the -- 2.11.4.GIT