| commit | 66440183377fb80569badadad689d673269fd5d5 | |
| author | Salvador Arroyo <sarroyofdez@yahoo.es> | |
| Thu, 1 Nov 2012 19:55:28 +0000 (1 20:55 +0100) | ||
| committer | Spencer Oliver <spen@spen-soft.co.uk> | |
| Fri, 16 Nov 2012 12:40:55 +0000 (16 12:40 +0000) | ||
| tree | f75202709353be441cc1c1913ec2b597bb09a4ca | treesnapshot (tar.gz zip) |
| parent | 9aad563d15da07fdd938014e65c1bbc38fcf3f6c | commitdiff |
mips: optimize CP0 read/write code
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.
Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
MIPS32_PRACC_BASE_ADDR is defined as 0xFF200000. Now is
possible to load the base address with a lui instruction and
only one pracc access.
Offsets to the pracc code addresses are defined to simplify the code
and probably make it a bit more readable or self-explained.
Change-Id: I853dd2d7fad52745931cc6e6be68c0ae156d897e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/951
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Tested-by: jenkins
| src/target/mips32_pracc.c | diffblobblamehistory | |
| src/target/mips32_pracc.h | diffblobblamehistory |