| commit | 08da1b4258a971a068401849c65b9d40f08ee44c | |
| author | Paul Fertser <fercerpav@gmail.com> | |
| Fri, 5 Dec 2014 10:18:36 +0000 (5 13:18 +0300) | ||
| committer | Paul Fertser <fercerpav@gmail.com> | |
| Fri, 30 Jan 2015 08:54:25 +0000 (30 08:54 +0000) | ||
| tree | 9474b6ac1195f7d11c7651074dc1bafe987843fa | treesnapshot (tar.gz zip) |
| parent | 1fa4c728aa9d93036b2e961f065405feeb238e10 | commitdiff |
flash/nor/kinetis: pull SRST low during mass erase
Mass erase operation might be impacted by different factors,
apparently the most reliable way is to do it while asserting the chip
reset line.
Change-Id: Id6ab57eaec86e402ffdf4f5c8843e7735640f03e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2424
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
Mass erase operation might be impacted by different factors,
apparently the most reliable way is to do it while asserting the chip
reset line.
Change-Id: Id6ab57eaec86e402ffdf4f5c8843e7735640f03e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2424
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>
| src/flash/nor/kinetis.c | diffblobblamehistory |