src/flash/nand/arm_io.c

   1 /*
   2  * Copyright (C) 2009 by Marvell Semiconductors, Inc.
   3  * Written by Nicolas Pitre <nico at marvell.com>
   4  *
   5  * Copyright (C) 2009 by David Brownell
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the
  19  * Free Software Foundation, Inc.,
  20  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  21  */
  22
  23 #ifdef HAVE_CONFIG_H
  24 #include "config.h"
  25 #endif
  26
  27 #include "core.h"
  28 #include "arm_io.h"
  29 #include <helper/binarybuffer.h>
  30 #include <target/arm.h>
  31 #include <target/armv7m.h>
  32 #include <target/algorithm.h>
  33
  34 /**
  35  * Copies code to a working area.  This will allocate room for the code plus the
  36  * additional amount requested if the working area pointer is null.
  37  *
  38  * @param target Pointer to the target to copy code to
  39  * @param code Pointer to the code area to be copied
  40  * @param code_size Size of the code being copied
  41  * @param additional Size of the additional area to be allocated in addition to
  42  *                   code
  43  * @param area Pointer to a pointer to a working area to copy code to
  44  * @return Success or failure of the operation
  45  */
  46 static int arm_code_to_working_area(struct target *target,
  47         const uint32_t *code, unsigned code_size,
  48         unsigned additional, struct working_area **area)
  49 {
  50         uint8_t code_buf[code_size];
  51         unsigned i;
  52         int retval;
  53         unsigned size = code_size + additional;
  54
  55         /* REVISIT this assumes size doesn't ever change.
  56          * That's usually correct; but there are boards with
  57          * both large and small page chips, where it won't be...
  58          */
  59
  60         /* make sure we have a working area */
  61         if (NULL == *area) {
  62                 retval = target_alloc_working_area(target, size, area);
  63                 if (retval != ERROR_OK) {
  64                         LOG_DEBUG("%s: no %d byte buffer", __func__, (int) size);
  65                         return ERROR_NAND_NO_BUFFER;
  66                 }
  67         }
  68
  69         /* buffer code in target endianness */
  70         for (i = 0; i < code_size / 4; i++)
  71                 target_buffer_set_u32(target, code_buf + i * 4, code[i]);
  72
  73         /* copy code to work area */
  74         retval = target_write_memory(target, (*area)->address,
  75                         4, code_size / 4, code_buf);
  76
  77         return retval;
  78 }
  79
  80 /**
  81  * ARM-specific bulk write from buffer to address of 8-bit wide NAND.
  82  * For now this supports ARMv4,ARMv5 and ARMv7-M cores.
  83  *
  84  * Enhancements to target_run_algorithm() could enable:
  85  *   - ARMv6 and ARMv7 cores in ARM mode
  86  *
  87  * Different code fragments could handle:
  88  *   - 16-bit wide data (needs different setup)
  89  *
  90  * @param nand Pointer to the arm_nand_data struct that defines the I/O
  91  * @param data Pointer to the data to be copied to flash
  92  * @param size Size of the data being copied
  93  * @return Success or failure of the operation
  94  */
  95 int arm_nandwrite(struct arm_nand_data *nand, uint8_t *data, int size)
  96 {
  97         struct target *target = nand->target;
  98         struct arm_algorithm armv4_5_algo;
  99         struct armv7m_algorithm armv7m_algo;
 100         void *arm_algo;
 101         struct arm *arm = target->arch_info;
 102         struct reg_param reg_params[3];
 103         uint32_t target_buf;
 104         uint32_t exit_var = 0;
 105         int retval;
 106
 107         /* Inputs:
 108          *  r0  NAND data address (byte wide)
 109          *  r1  buffer address
 110          *  r2  buffer length
 111          */
 112         static const uint32_t code_armv4_5[] = {
 113                 0xe4d13001,     /* s: ldrb  r3, [r1], #1 */
 114                 0xe5c03000,     /*    strb  r3, [r0]     */
 115                 0xe2522001,     /*    subs  r2, r2, #1   */
 116                 0x1afffffb,     /*    bne   s            */
 117
 118                 /* exit: ARMv4 needs hardware breakpoint */
 119                 0xe1200070,     /* e: bkpt  #0           */
 120         };
 121
 122         /* Inputs:
 123          *  r0  NAND data address (byte wide)
 124          *  r1  buffer address
 125          *  r2  buffer length
 126          *
 127          * see contrib/loaders/flash/armv7m_io.s for src
 128          */
 129         static const uint32_t code_armv7m[] = {
 130                 0x3b01f811,
 131                 0x3a017003,
 132                 0xaffaf47f,
 133                 0xbf00be00,
 134         };
 135
 136         int target_code_size = 0;
 137         const uint32_t *target_code_src = NULL;
 138
 139         /* set up algorithm */
 140         if (is_armv7m(target_to_armv7m(target))) {  /* armv7m target */
 141                 armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
 142                 armv7m_algo.core_mode = ARM_MODE_THREAD;
 143                 arm_algo = &armv7m_algo;
 144                 target_code_size = sizeof(code_armv7m);
 145                 target_code_src = code_armv7m;
 146         } else {
 147                 armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
 148                 armv4_5_algo.core_mode = ARM_MODE_SVC;
 149                 armv4_5_algo.core_state = ARM_STATE_ARM;
 150                 arm_algo = &armv4_5_algo;
 151                 target_code_size = sizeof(code_armv4_5);
 152                 target_code_src = code_armv4_5;
 153         }
 154
 155         if (nand->op != ARM_NAND_WRITE || !nand->copy_area) {
 156                 retval = arm_code_to_working_area(target, target_code_src, target_code_size,
 157                                 nand->chunk_size, &nand->copy_area);
 158                 if (retval != ERROR_OK)
 159                         return retval;
 160         }
 161
 162         nand->op = ARM_NAND_WRITE;
 163
 164         /* copy data to work area */
 165         target_buf = nand->copy_area->address + target_code_size;
 166         retval = target_write_buffer(target, target_buf, size, data);
 167         if (retval != ERROR_OK)
 168                 return retval;
 169
 170         /* set up parameters */
 171         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 172         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 173         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 174
 175         buf_set_u32(reg_params[0].value, 0, 32, nand->data);
 176         buf_set_u32(reg_params[1].value, 0, 32, target_buf);
 177         buf_set_u32(reg_params[2].value, 0, 32, size);
 178
 179         /* armv4 must exit using a hardware breakpoint */
 180         if (arm->is_armv4)
 181                 exit_var = nand->copy_area->address + target_code_size - 4;
 182
 183         /* use alg to write data from work area to NAND chip */
 184         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 185                         nand->copy_area->address, exit_var, 1000, arm_algo);
 186         if (retval != ERROR_OK)
 187                 LOG_ERROR("error executing hosted NAND write");
 188
 189         destroy_reg_param(&reg_params[0]);
 190         destroy_reg_param(&reg_params[1]);
 191         destroy_reg_param(&reg_params[2]);
 192
 193         return retval;
 194 }
 195
 196 /**
 197  * Uses an on-chip algorithm for an ARM device to read from a NAND device and
 198  * store the data into the host machine's memory.
 199  *
 200  * @param nand Pointer to the arm_nand_data struct that defines the I/O
 201  * @param data Pointer to the data buffer to store the read data
 202  * @param size Amount of data to be stored to the buffer.
 203  * @return Success or failure of the operation
 204  */
 205 int arm_nandread(struct arm_nand_data *nand, uint8_t *data, uint32_t size)
 206 {
 207         struct target *target = nand->target;
 208         struct arm_algorithm armv4_5_algo;
 209         struct armv7m_algorithm armv7m_algo;
 210         void *arm_algo;
 211         struct arm *arm = target->arch_info;
 212         struct reg_param reg_params[3];
 213         uint32_t target_buf;
 214         uint32_t exit_var = 0;
 215         int retval;
 216
 217         /* Inputs:
 218          *  r0  buffer address
 219          *  r1  NAND data address (byte wide)
 220          *  r2  buffer length
 221          */
 222         static const uint32_t code_armv4_5[] = {
 223                 0xe5d13000,     /* s: ldrb  r3, [r1]     */
 224                 0xe4c03001,     /*    strb  r3, [r0], #1 */
 225                 0xe2522001,     /*    subs  r2, r2, #1   */
 226                 0x1afffffb,     /*    bne   s            */
 227
 228                 /* exit: ARMv4 needs hardware breakpoint */
 229                 0xe1200070,     /* e: bkpt  #0           */
 230         };
 231
 232         /* Inputs:
 233          *  r0  buffer address
 234          *  r1  NAND data address (byte wide)
 235          *  r2  buffer length
 236          *
 237          * see contrib/loaders/flash/armv7m_io.s for src
 238          */
 239         static const uint32_t code_armv7m[] = {
 240                 0xf800780b,
 241                 0x3a013b01,
 242                 0xaffaf47f,
 243                 0xbf00be00,
 244         };
 245
 246         int target_code_size = 0;
 247         const uint32_t *target_code_src = NULL;
 248
 249         /* set up algorithm */
 250         if (is_armv7m(target_to_armv7m(target))) {  /* armv7m target */
 251                 armv7m_algo.common_magic = ARMV7M_COMMON_MAGIC;
 252                 armv7m_algo.core_mode = ARM_MODE_THREAD;
 253                 arm_algo = &armv7m_algo;
 254                 target_code_size = sizeof(code_armv7m);
 255                 target_code_src = code_armv7m;
 256         } else {
 257                 armv4_5_algo.common_magic = ARM_COMMON_MAGIC;
 258                 armv4_5_algo.core_mode = ARM_MODE_SVC;
 259                 armv4_5_algo.core_state = ARM_STATE_ARM;
 260                 arm_algo = &armv4_5_algo;
 261                 target_code_size = sizeof(code_armv4_5);
 262                 target_code_src = code_armv4_5;
 263         }
 264
 265         /* create the copy area if not yet available */
 266         if (nand->op != ARM_NAND_READ || !nand->copy_area) {
 267                 retval = arm_code_to_working_area(target, target_code_src, target_code_size,
 268                                 nand->chunk_size, &nand->copy_area);
 269                 if (retval != ERROR_OK)
 270                         return retval;
 271         }
 272
 273         nand->op = ARM_NAND_READ;
 274         target_buf = nand->copy_area->address + target_code_size;
 275
 276         /* set up parameters */
 277         init_reg_param(&reg_params[0], "r0", 32, PARAM_IN);
 278         init_reg_param(&reg_params[1], "r1", 32, PARAM_IN);
 279         init_reg_param(&reg_params[2], "r2", 32, PARAM_IN);
 280
 281         buf_set_u32(reg_params[0].value, 0, 32, target_buf);
 282         buf_set_u32(reg_params[1].value, 0, 32, nand->data);
 283         buf_set_u32(reg_params[2].value, 0, 32, size);
 284
 285         /* armv4 must exit using a hardware breakpoint */
 286         if (arm->is_armv4)
 287                 exit_var = nand->copy_area->address + target_code_size - 4;
 288
 289         /* use alg to write data from NAND chip to work area */
 290         retval = target_run_algorithm(target, 0, NULL, 3, reg_params,
 291                         nand->copy_area->address, exit_var, 1000, arm_algo);
 292         if (retval != ERROR_OK)
 293                 LOG_ERROR("error executing hosted NAND read");
 294
 295         destroy_reg_param(&reg_params[0]);
 296         destroy_reg_param(&reg_params[1]);
 297         destroy_reg_param(&reg_params[2]);
 298
 299         /* read from work area to the host's memory */
 300         retval = target_read_buffer(target, target_buf, size, data);
 301
 302         return retval;
 303 }