From aa6af4903f63cd7402b3d7a21da00f6c84350709 Mon Sep 17 00:00:00 2001 From: rearnsha Date: Fri, 19 Aug 2005 13:17:04 +0000 Subject: [PATCH] PR target/23473 * arm.md (arm_load_pic_register): Change argument to the mask of saved registers. Call thumb_find_work_register if we need a scratch register on Thumb. (arm_expand_prologue): Pass empty register set to arm_load_pic_register. (thumb_expand_prologue): Pass live_regs_mask directly to arm_load_pic_register. * arm-protos.h (arm_load_pic_register): Update prototype. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@103277 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 12 ++++++++++++ gcc/config/arm/arm-protos.h | 2 +- gcc/config/arm/arm.c | 11 ++++++----- 3 files changed, 19 insertions(+), 6 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index bafacaf83fc..d32500786d6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,15 @@ +2005-08-19 Richard Earnshaw + + PR target/23473 + * arm.md (arm_load_pic_register): Change argument to the mask of + saved registers. Call thumb_find_work_register if we need a + scratch register on Thumb. + (arm_expand_prologue): Pass empty register set to + arm_load_pic_register. + (thumb_expand_prologue): Pass live_regs_mask directly to + arm_load_pic_register. + * arm-protos.h (arm_load_pic_register): Update prototype. + 2005-08-19 J"orn Rennecke * sh.c (find_sole_member): New function. diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index cb34f3bb101..c7ec642c728 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -27,7 +27,7 @@ extern void arm_override_options (void); extern int use_return_insn (int, rtx); extern int arm_regno_class (int); -extern void arm_load_pic_register (unsigned int); +extern void arm_load_pic_register (unsigned long); extern int arm_volatile_func (void); extern const char *arm_output_epilogue (rtx); extern void arm_expand_prologue (void); diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 9534a914f3c..0235c53b08e 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -3285,7 +3285,7 @@ thumb_find_work_register (unsigned long pushed_regs_mask) low register. */ void -arm_load_pic_register (unsigned int scratch) +arm_load_pic_register (unsigned long saved_regs ATTRIBUTE_UNUSED) { #ifndef AOF_ASSEMBLER rtx l1, pic_tmp, pic_tmp2, pic_rtx; @@ -3319,9 +3319,10 @@ arm_load_pic_register (unsigned int scratch) { if (REGNO (pic_offset_table_rtx) > LAST_LO_REGNUM) { - /* We will have pushed the pic register, so should always be + /* We will have pushed the pic register, so we should always be able to find a work register. */ - pic_tmp = gen_rtx_REG (SImode, scratch); + pic_tmp = gen_rtx_REG (SImode, + thumb_find_work_register (saved_regs)); emit_insn (gen_pic_load_addr_thumb (pic_tmp, pic_rtx)); emit_insn (gen_movsi (pic_offset_table_rtx, pic_tmp)); } @@ -10509,7 +10510,7 @@ arm_expand_prologue (void) if (flag_pic) - arm_load_pic_register (INVALID_REGNUM); + arm_load_pic_register (0UL); /* If we are profiling, make sure no instructions are scheduled before the call to mcount. Similarly if the user has requested no @@ -13236,7 +13237,7 @@ thumb_expand_prologue (void) /* Load the pic register before setting the frame pointer, so we can use r7 as a temporary work register. */ if (flag_pic) - arm_load_pic_register (thumb_find_work_register (live_regs_mask)); + arm_load_pic_register (live_regs_mask); offsets = arm_get_frame_offsets (); -- 2.11.4.GIT