From a1460a402ad7b344f60e60188ffd76450d9b5ad4 Mon Sep 17 00:00:00 2001 From: nickc Date: Tue, 15 Jun 2004 10:40:44 +0000 Subject: [PATCH] * longlong.h: Fix macros for m32r add_ssaaaa and sub_ddmmss. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@83174 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 2 ++ gcc/longlong.h | 8 ++++---- 2 files changed, 6 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d2c7c64e254..fec39d76c9e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -12,6 +12,8 @@ (m32r_return_addr): Added for __builtin_return_address(0). (m32r_reload_lr): Ditto. + * longlong.h: Fix macros for m32r add_ssaaaa and sub_ddmmss. + 2004-06-15 Paolo Bonzini * doc/install.texi (Prerequisites): Update libbanshee, diff --git a/gcc/longlong.h b/gcc/longlong.h index 0f5d05ffe2d..05a706517b8 100644 --- a/gcc/longlong.h +++ b/gcc/longlong.h @@ -376,17 +376,17 @@ UDItype __umulsidi3 (USItype, USItype); #if defined (__M32R__) && W_TYPE_SIZE == 32 #define add_ssaaaa(sh, sl, ah, al, bh, bl) \ /* The cmp clears the condition bit. */ \ - __asm__ ("cmp %0,%0\n\taddx %%5,%1\n\taddx %%3,%0" \ + __asm__ ("cmp %0,%0\n\taddx %1,%5\n\taddx %0,%3" \ : "=r" ((USItype) (sh)), \ "=&r" ((USItype) (sl)) \ - : "%0" ((USItype) (ah)), \ + : "0" ((USItype) (ah)), \ "r" ((USItype) (bh)), \ - "%1" ((USItype) (al)), \ + "1" ((USItype) (al)), \ "r" ((USItype) (bl)) \ : "cbit") #define sub_ddmmss(sh, sl, ah, al, bh, bl) \ /* The cmp clears the condition bit. */ \ - __asm__ ("cmp %0,%0\n\tsubx %5,%1\n\tsubx %3,%0" \ + __asm__ ("cmp %0,%0\n\tsubx %1,%5\n\tsubx %0,%3" \ : "=r" ((USItype) (sh)), \ "=&r" ((USItype) (sl)) \ : "0" ((USItype) (ah)), \ -- 2.11.4.GIT