From 4aab61ad38e810dcff5e37a057b13ebe95701511 Mon Sep 17 00:00:00 2001 From: vmakarov Date: Thu, 10 Apr 2008 19:28:32 +0000 Subject: [PATCH] 2008-04-10 Vladimir Makarov * gcc.dg/200804010-1.c: New. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/ira@134172 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/testsuite/ChangeLog | 4 ++++ gcc/testsuite/gcc.dg/20080410-1.c | 28 ++++++++++++++++++++++++++++ 2 files changed, 32 insertions(+) create mode 100644 gcc/testsuite/gcc.dg/20080410-1.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 2ac6eb02a20..dbf90dde653 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2008-04-10 Vladimir Makarov + + * gcc.dg/200804010-1.c: New. + 2008-03-28 Tobias Burnus PR fortran/35721 diff --git a/gcc/testsuite/gcc.dg/20080410-1.c b/gcc/testsuite/gcc.dg/20080410-1.c new file mode 100644 index 00000000000..ebd783dd05d --- /dev/null +++ b/gcc/testsuite/gcc.dg/20080410-1.c @@ -0,0 +1,28 @@ +/* { dg-do compile { target "sh-*-*" } } */ +/* { dg-options "-O0 -m4 -ml -fira" } */ +/* { dg-final { scan-assembler-not "add\tr0,r0" } } */ + +/* This test checks that chain reloads conflict. I they don't + conflict, the same hard register R0 is used for the both reloads + but in this case the second reload needs an intermediate register + (which is the reload register). As the result we have the + following code + + mov #4,r0 -- first reload + mov r14,r0 -- second reload + add r0,r0 -- second reload + + The right code should be + + mov #4,r0 -- first reload + mov r14,r1 -- second reload + add r0,r1 -- second reload + +*/ + +_Complex float foo_float (); + +void bar_float () +{ + __real foo_float (); +} -- 2.11.4.GIT