From 23ac7ed9b30c528b280d611f5b201f1721b99b62 Mon Sep 17 00:00:00 2001 From: segher Date: Thu, 11 Dec 2014 14:29:14 +0000 Subject: [PATCH] * combine.c (try_combine): Do not allow combining a PARALLEL I2 with a register move I3 if that I2 is an asm. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218623 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 5 +++++ gcc/combine.c | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 530147080b9..fa79ce977b9 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2014-12-11 Segher Boessenkool + + * combine.c (try_combine): Do not allow combining a PARALLEL I2 + with a register move I3 if that I2 is an asm. + 2014-12-11 Kyrylo Tkachov * config/arm/arm_neon.h (vrndqn_f32): Rename to... diff --git a/gcc/combine.c b/gcc/combine.c index 9ed03be2219..c95b493886b 100644 --- a/gcc/combine.c +++ b/gcc/combine.c @@ -2716,6 +2716,13 @@ try_combine (rtx_insn *i3, rtx_insn *i2, rtx_insn *i1, rtx_insn *i0, SET_DEST (XVECEXP (p2, 0, i)))) break; + /* Make sure this PARALLEL is not an asm. We do not allow combining + that usually (see can_combine_p), so do not here either. */ + for (i = 0; i < XVECLEN (p2, 0); i++) + if (GET_CODE (XVECEXP (p2, 0, i)) == SET + && GET_CODE (SET_SRC (XVECEXP (p2, 0, i))) == ASM_OPERANDS) + break; + if (i == XVECLEN (p2, 0)) for (i = 0; i < XVECLEN (p2, 0); i++) if (GET_CODE (XVECEXP (p2, 0, i)) == SET -- 2.11.4.GIT