1 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
3 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
4 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
6 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
8 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
9 different rtl trees depending on TARGET_64BIT.
10 (rs6000_gen_lvx): Likewise.
12 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
14 * config/visium/visium.md (nop): Tweak comment.
15 (hazard_nop): Likewise.
17 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
19 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
20 -mspeculate-indirect-jumps.
21 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
22 for -mno-speculate-indirect-jumps.
23 (*call_indirect_elfv2<mode>_nospec): New define_insn.
24 (*call_value_indirect_elfv2<mode>): Disable for
25 -mno-speculate-indirect-jumps.
26 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
27 (indirect_jump): Emit different RTL for
28 -mno-speculate-indirect-jumps.
29 (*indirect_jump<mode>): Disable for
30 -mno-speculate-indirect-jumps.
31 (*indirect_jump<mode>_nospec): New define_insn.
32 (tablejump): Emit different RTL for
33 -mno-speculate-indirect-jumps.
34 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
35 (tablejumpsi_nospec): New define_expand.
36 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
37 (tablejumpdi_nospec): New define_expand.
38 (*tablejump<mode>_internal1): Disable for
39 -mno-speculate-indirect-jumps.
40 (*tablejump<mode>_internal1_nospec): New define_insn.
41 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
44 2018-01-16 Artyom Skrobov tyomitch@gmail.com
46 * caller-save.c (insert_save): Drop unnecessary parameter. All
49 2018-01-16 Jakub Jelinek <jakub@redhat.com>
50 Richard Biener <rguenth@suse.de>
53 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
54 return early, inline manually is_gimple_sizepos. Make sure if we
55 call gimplify_expr we don't end up with a gimple constant.
56 * tree.c (variably_modified_type_p): Don't return true for
57 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
58 * gimplify.h (is_gimple_sizepos): Remove.
60 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
62 PR tree-optimization/83857
63 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
64 vectorizable_live_operation for pure SLP statements.
65 (vectorizable_live_operation): Handle PHIs.
67 2018-01-16 Richard Biener <rguenther@suse.de>
69 PR tree-optimization/83867
70 * tree-vect-stmts.c (vect_transform_stmt): Precompute
71 nested_in_vect_loop_p since the scalar stmt may get invalidated.
73 2018-01-16 Jakub Jelinek <jakub@redhat.com>
76 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
77 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
78 If off is not INTEGER_CST, issue a may not be aligned warning
79 rather than isn't aligned. Use isn%'t rather than isn't.
80 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
82 <case MULT_EXPR>: Improve the case when bottom and one of the
83 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
84 operand, in that case check if the other operand is multiple of
85 bottom divided by the INTEGER_CST operand.
87 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
90 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
91 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
92 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
93 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
94 * config/pa/pa.c (pa_function_arg_advance): Likewise.
95 (pa_function_arg, pa_arg_partial_bytes): Likewise.
96 (pa_function_arg_size): New function.
98 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
100 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
101 in a separate statement.
103 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
105 PR tree-optimization/83847
106 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
107 group gathers and scatters.
109 2018-01-16 Jakub Jelinek <jakub@redhat.com>
111 PR rtl-optimization/86620
112 * params.def (max-sched-ready-insns): Bump minimum value to 1.
114 PR rtl-optimization/83213
115 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
116 to last if both are JUMP_INSNs.
118 PR tree-optimization/83843
119 * gimple-ssa-store-merging.c
120 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
121 store_immediate_info for bswap/nop orig_stores.
123 2018-01-15 Andrew Waterman <andrew@sifive.com>
125 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
127 <UDIV>: Increase cost if !TARGET_DIV.
129 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
131 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
132 (define_attr "cr_logical_3op"): New.
133 (cceq_ior_compare): Adjust.
134 (cceq_ior_compare_complement): Adjust.
135 (*cceq_rev_compare): Adjust.
136 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
137 (is_cracked_insn): Adjust.
138 (insn_must_be_first_in_group): Adjust.
139 * config/rs6000/40x.md: Adjust.
140 * config/rs6000/440.md: Adjust.
141 * config/rs6000/476.md: Adjust.
142 * config/rs6000/601.md: Adjust.
143 * config/rs6000/603.md: Adjust.
144 * config/rs6000/6xx.md: Adjust.
145 * config/rs6000/7450.md: Adjust.
146 * config/rs6000/7xx.md: Adjust.
147 * config/rs6000/8540.md: Adjust.
148 * config/rs6000/cell.md: Adjust.
149 * config/rs6000/e300c2c3.md: Adjust.
150 * config/rs6000/e500mc.md: Adjust.
151 * config/rs6000/e500mc64.md: Adjust.
152 * config/rs6000/e5500.md: Adjust.
153 * config/rs6000/e6500.md: Adjust.
154 * config/rs6000/mpc.md: Adjust.
155 * config/rs6000/power4.md: Adjust.
156 * config/rs6000/power5.md: Adjust.
157 * config/rs6000/power6.md: Adjust.
158 * config/rs6000/power7.md: Adjust.
159 * config/rs6000/power8.md: Adjust.
160 * config/rs6000/power9.md: Adjust.
161 * config/rs6000/rs64.md: Adjust.
162 * config/rs6000/titan.md: Adjust.
164 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
166 * config/i386/predicates.md (indirect_branch_operand): Rewrite
167 ix86_indirect_branch_register logic.
169 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
171 * config/i386/constraints.md (Bs): Update
172 ix86_indirect_branch_register check. Don't check
173 ix86_indirect_branch_register with GOT_memory_operand.
175 * config/i386/predicates.md (GOT_memory_operand): Don't check
176 ix86_indirect_branch_register here.
177 (GOT32_symbol_operand): Likewise.
179 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
181 * config/i386/predicates.md (constant_call_address_operand):
182 Rewrite ix86_indirect_branch_register logic.
183 (sibcall_insn_operand): Likewise.
185 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
187 * config/i386/constraints.md (Bs): Replace
188 ix86_indirect_branch_thunk_register with
189 ix86_indirect_branch_register.
191 * config/i386/i386.md (indirect_jump): Likewise.
192 (tablejump): Likewise.
193 (*sibcall_memory): Likewise.
194 (*sibcall_value_memory): Likewise.
195 Peepholes of indirect call and jump via memory: Likewise.
196 * config/i386/i386.opt: Likewise.
197 * config/i386/predicates.md (indirect_branch_operand): Likewise.
198 (GOT_memory_operand): Likewise.
199 (call_insn_operand): Likewise.
200 (sibcall_insn_operand): Likewise.
201 (GOT32_symbol_operand): Likewise.
203 2018-01-15 Jakub Jelinek <jakub@redhat.com>
206 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
207 type rather than type addr's type points to.
208 (expand_omp_atomic_mutex): Likewise.
209 (expand_omp_atomic): Likewise.
211 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
214 * config/i386/i386.c (output_indirect_thunk_function): Use
215 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
216 for __x86_return_thunk.
218 2018-01-15 Richard Biener <rguenther@suse.de>
221 * expmed.c (extract_bit_field_1): Fix typo.
223 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
226 * config/arm/iterators.md (VF): New mode iterator.
227 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
228 Remove integer-related logic from pattern.
229 (neon_vabd<mode>_3): Likewise.
231 2018-01-15 Jakub Jelinek <jakub@redhat.com>
234 * common.opt (fstrict-overflow): No longer an alias.
235 (fwrapv-pointer): New option.
236 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
237 also for pointer types based on flag_wrapv_pointer.
238 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
239 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
240 opts->x_flag_wrapv got set.
241 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
242 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
243 POINTER_TYPE_OVERFLOW_UNDEFINED.
244 * match.pd: Likewise in address comparison pattern.
245 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
247 2018-01-15 Richard Biener <rguenther@suse.de>
250 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
251 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
252 Reset type names to their identifier if their TYPE_DECL doesn't
253 have linkage (and thus is used for ODR and devirt).
254 (save_debug_info_for_decl): Remove.
255 (save_debug_info_for_type): Likewise.
256 (add_tree_to_fld_list): Adjust.
257 * tree-pretty-print.c (dump_generic_node): Make dumping of
258 type names more robust.
260 2018-01-15 Richard Biener <rguenther@suse.de>
262 * BASE-VER: Bump to 8.0.1.
264 2018-01-14 Martin Sebor <msebor@redhat.com>
267 * builtins.c (check_access): Avoid warning when the no-warning bit
270 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
272 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
273 * ira-color (allocno_hard_regs_compare): Likewise.
275 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
278 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
279 Use .pushsection/.popsection.
281 2018-01-14 Martin Sebor <msebor@redhat.com>
284 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
286 2018-01-14 Jakub Jelinek <jakub@redhat.com>
288 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
289 entry from extra_headers.
290 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
291 extra_headers, make the list bitwise identical to the i?86-*-* one.
293 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
295 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
296 -mcmodel=large with -mindirect-branch=thunk,
297 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
298 -mfunction-return=thunk-extern.
299 * doc/invoke.texi: Document -mcmodel=large is incompatible with
300 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
301 -mfunction-return=thunk and -mfunction-return=thunk-extern.
303 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
305 * config/i386/i386.c (print_reg): Print the name of the full
306 integer register without '%'.
307 (ix86_print_operand): Handle 'V'.
308 * doc/extend.texi: Document 'V' modifier.
310 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
312 * config/i386/constraints.md (Bs): Disallow memory operand for
313 -mindirect-branch-register.
315 * config/i386/predicates.md (indirect_branch_operand): Likewise.
316 (GOT_memory_operand): Likewise.
317 (call_insn_operand): Likewise.
318 (sibcall_insn_operand): Likewise.
319 (GOT32_symbol_operand): Likewise.
320 * config/i386/i386.md (indirect_jump): Call convert_memory_address
321 for -mindirect-branch-register.
322 (tablejump): Likewise.
323 (*sibcall_memory): Likewise.
324 (*sibcall_value_memory): Likewise.
325 Disallow peepholes of indirect call and jump via memory for
326 -mindirect-branch-register.
327 (*call_pop): Replace m with Bw.
328 (*call_value_pop): Likewise.
329 (*sibcall_pop_memory): Replace m with Bs.
330 * config/i386/i386.opt (mindirect-branch-register): New option.
331 * doc/invoke.texi: Document -mindirect-branch-register option.
333 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
335 * config/i386/i386-protos.h (ix86_output_function_return): New.
336 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
337 set function_return_type.
338 (indirect_thunk_name): Add ret_p to indicate thunk for function
340 (output_indirect_thunk_function): Pass false to
342 (ix86_output_indirect_branch_via_reg): Likewise.
343 (ix86_output_indirect_branch_via_push): Likewise.
344 (output_indirect_thunk_function): Create alias for function
345 return thunk if regno < 0.
346 (ix86_output_function_return): New function.
347 (ix86_handle_fndecl_attribute): Handle function_return.
348 (ix86_attribute_table): Add function_return.
349 * config/i386/i386.h (machine_function): Add
350 function_return_type.
351 * config/i386/i386.md (simple_return_internal): Use
352 ix86_output_function_return.
353 (simple_return_internal_long): Likewise.
354 * config/i386/i386.opt (mfunction-return=): New option.
355 (indirect_branch): Mention -mfunction-return=.
356 * doc/extend.texi: Document function_return function attribute.
357 * doc/invoke.texi: Document -mfunction-return= option.
359 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
361 * config/i386/i386-opts.h (indirect_branch): New.
362 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
363 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
364 with local indirect jump when converting indirect call and jump.
365 (ix86_set_indirect_branch_type): New.
366 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
367 (indirectlabelno): New.
368 (indirect_thunk_needed): Likewise.
369 (indirect_thunk_bnd_needed): Likewise.
370 (indirect_thunks_used): Likewise.
371 (indirect_thunks_bnd_used): Likewise.
372 (INDIRECT_LABEL): Likewise.
373 (indirect_thunk_name): Likewise.
374 (output_indirect_thunk): Likewise.
375 (output_indirect_thunk_function): Likewise.
376 (ix86_output_indirect_branch_via_reg): Likewise.
377 (ix86_output_indirect_branch_via_push): Likewise.
378 (ix86_output_indirect_branch): Likewise.
379 (ix86_output_indirect_jmp): Likewise.
380 (ix86_code_end): Call output_indirect_thunk_function if needed.
381 (ix86_output_call_insn): Call ix86_output_indirect_branch if
383 (ix86_handle_fndecl_attribute): Handle indirect_branch.
384 (ix86_attribute_table): Add indirect_branch.
385 * config/i386/i386.h (machine_function): Add indirect_branch_type
386 and has_local_indirect_jump.
387 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
389 (tablejump): Likewise.
390 (*indirect_jump): Use ix86_output_indirect_jmp.
391 (*tablejump_1): Likewise.
392 (simple_return_indirect_internal): Likewise.
393 * config/i386/i386.opt (mindirect-branch=): New option.
394 (indirect_branch): New.
397 (thunk-inline): Likewise.
398 (thunk-extern): Likewise.
399 * doc/extend.texi: Document indirect_branch function attribute.
400 * doc/invoke.texi: Document -mindirect-branch= option.
402 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
405 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
407 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
409 * ipa-inline.c (want_inline_small_function_p): Return false if
410 inlining has already failed with CIF_FINAL_ERROR.
411 (update_caller_keys): Call want_inline_small_function_p before
413 (update_callee_keys): Likewise.
415 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
417 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
419 (rs6000_quadword_masked_address_p): Likewise.
420 (quad_aligned_load_p): Likewise.
421 (quad_aligned_store_p): Likewise.
422 (const_load_sequence_p): Add comment to describe the outer-most loop.
423 (mimic_memory_attributes_and_flags): New function.
424 (rs6000_gen_stvx): Likewise.
425 (replace_swapped_aligned_store): Likewise.
426 (rs6000_gen_lvx): Likewise.
427 (replace_swapped_aligned_load): Likewise.
428 (replace_swapped_load_constant): Capitalize argument name in
429 comment describing this function.
430 (rs6000_analyze_swaps): Add a third pass to search for vector loads
431 and stores that access quad-word aligned addresses and replace
432 with stvx or lvx instructions when appropriate.
433 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
434 New function prototype.
435 (rs6000_quadword_masked_address_p): Likewise.
436 (rs6000_gen_lvx): Likewise.
437 (rs6000_gen_stvx): Likewise.
438 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
439 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
440 when memory address is aligned.
441 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
442 this split to select lvx instruction when memory address is aligned.
443 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
444 instruction when memory address is aligned.
445 (*vsx_le_perm_load_v16qi): Likewise.
446 (four unnamed splitters): Modify to select the stvx instruction
447 when memory is aligned.
449 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
451 * predict.c (determine_unlikely_bbs): Handle correctly BBs
452 which appears in the queue multiple times.
454 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
455 Alan Hayward <alan.hayward@arm.com>
456 David Sherwood <david.sherwood@arm.com>
458 * tree-vectorizer.h (vec_lower_bound): New structure.
459 (_loop_vec_info): Add check_nonzero and lower_bounds.
460 (LOOP_VINFO_CHECK_NONZERO): New macro.
461 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
462 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
463 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
464 fields. Make seg_len the distance travelled, not including the
466 (dr_direction_indicator): Declare.
467 (dr_zero_step_indicator): Likewise.
468 (dr_known_forward_stride_p): Likewise.
469 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
471 (runtime_alias_check_p): Allow runtime alias checks with
473 (operator ==): Compare access_size and align.
474 (prune_runtime_alias_test_list): Rework for new distinction between
475 the access_size and seg_len.
476 (create_intersect_range_checks_index): Likewise. Cope with polynomial
478 (get_segment_min_max): New function.
479 (create_intersect_range_checks): Use it.
480 (dr_step_indicator): New function.
481 (dr_direction_indicator): Likewise.
482 (dr_zero_step_indicator): Likewise.
483 (dr_known_forward_stride_p): Likewise.
484 * tree-loop-distribution.c (data_ref_segment_size): Return
485 DR_STEP * (niters - 1).
486 (compute_alias_check_pairs): Update call to the dr_with_seg_len
488 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
489 (vect_preserves_scalar_order_p): New function, split out from...
490 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
491 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
492 (vect_vfa_access_size): New function.
493 (vect_vfa_align): Likewise.
494 (vect_compile_time_alias): Take access_size_a and access_b arguments.
495 (dump_lower_bound): New function.
496 (vect_check_lower_bound): Likewise.
497 (vect_small_gap_p): Likewise.
498 (vectorizable_with_step_bound_p): Likewise.
499 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
500 depencies if the vectorization factor is 1. Convert the checks
501 for nonzero steps into checks on the bounds of DR_STEP. Try using
502 a bunds check for variable steps if the minimum required step is
503 relatively small. Update calls to the dr_with_seg_len
504 constructor and to vect_compile_time_alias.
505 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
507 (vect_loop_versioning): Call it.
508 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
510 (vect_estimate_min_profitable_iters): Account for any bounds checks.
512 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
513 Alan Hayward <alan.hayward@arm.com>
514 David Sherwood <david.sherwood@arm.com>
516 * doc/sourcebuild.texi (vect_scatter_store): Document.
517 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
519 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
521 * genopinit.c (main): Add supports_vec_scatter_store and
522 supports_vec_scatter_store_cached to target_optabs.
523 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
524 IFN_MASK_SCATTER_STORE.
525 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
527 * internal-fn.h (internal_store_fn_p): Declare.
528 (internal_fn_stored_value_index): Likewise.
529 * internal-fn.c (scatter_store_direct): New macro.
530 (expand_scatter_store_optab_fn): New function.
531 (direct_scatter_store_optab_supported_p): New macro.
532 (internal_store_fn_p): New function.
533 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
534 IFN_MASK_SCATTER_STORE.
535 (internal_fn_mask_index): Likewise.
536 (internal_fn_stored_value_index): New function.
537 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
539 * optabs-query.h (supports_vec_scatter_store_p): Declare.
540 * optabs-query.c (supports_vec_scatter_store_p): New function.
541 * tree-vectorizer.h (vect_get_store_rhs): Declare.
542 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
543 true for scatter stores.
544 (vect_gather_scatter_fn_p): Handle scatter stores too.
545 (vect_check_gather_scatter): Consider using scatter stores if
546 supports_vec_scatter_store_p.
547 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
549 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
550 internal_fn_stored_value_index.
551 (check_load_store_masking): Handle scatter stores too.
552 (vect_get_store_rhs): Make public.
553 (vectorizable_call): Use internal_store_fn_p.
554 (vectorizable_store): Handle scatter store internal functions.
555 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
556 when deciding whether the end of the group has been reached.
557 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
558 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
559 (mask_scatter_store<mode>): New insns.
561 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
562 Alan Hayward <alan.hayward@arm.com>
563 David Sherwood <david.sherwood@arm.com>
565 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
566 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
567 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
569 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
570 Use vect_truncate_gather_scatter_offset if we can't treat the
571 operation as a normal gather load or scatter store.
572 (get_group_load_store_type): Take the gather_scatter_info
573 as argument. Try using a gather load or scatter store for
574 single-element groups.
575 (get_load_store_type): Update calls to get_group_load_store_type
576 and vect_use_strided_gather_scatters_p.
578 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
579 Alan Hayward <alan.hayward@arm.com>
580 David Sherwood <david.sherwood@arm.com>
582 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
583 optional tree argument.
584 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
586 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
587 but continue to use the current value as a fallback.
588 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
589 to compare the updates.
590 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
591 (get_load_store_type): Use it when handling a strided access.
592 (vect_get_strided_load_store_ops): New function.
593 (vect_get_data_ptr_increment): Likewise.
594 (vectorizable_load): Handle strided gather loads. Always pass
595 a step to vect_create_data_ref_ptr and bump_vector_ptr.
597 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
598 Alan Hayward <alan.hayward@arm.com>
599 David Sherwood <david.sherwood@arm.com>
601 * doc/md.texi (gather_load@var{m}): Document.
602 (mask_gather_load@var{m}): Likewise.
603 * genopinit.c (main): Add supports_vec_gather_load and
604 supports_vec_gather_load_cached to target_optabs.
605 * optabs-tree.c (init_tree_optimization_optabs): Use
606 ggc_cleared_alloc to allocate target_optabs.
607 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
608 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
610 * internal-fn.h (internal_load_fn_p): Declare.
611 (internal_gather_scatter_fn_p): Likewise.
612 (internal_fn_mask_index): Likewise.
613 (internal_gather_scatter_fn_supported_p): Likewise.
614 * internal-fn.c (gather_load_direct): New macro.
615 (expand_gather_load_optab_fn): New function.
616 (direct_gather_load_optab_supported_p): New macro.
617 (direct_internal_fn_optab): New function.
618 (internal_load_fn_p): Likewise.
619 (internal_gather_scatter_fn_p): Likewise.
620 (internal_fn_mask_index): Likewise.
621 (internal_gather_scatter_fn_supported_p): Likewise.
622 * optabs-query.c (supports_at_least_one_mode_p): New function.
623 (supports_vec_gather_load_p): Likewise.
624 * optabs-query.h (supports_vec_gather_load_p): Declare.
625 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
626 and memory_type field.
627 (NUM_PATTERNS): Bump to 15.
628 * tree-vect-data-refs.c: Include internal-fn.h.
629 (vect_gather_scatter_fn_p): New function.
630 (vect_describe_gather_scatter_call): Likewise.
631 (vect_check_gather_scatter): Try using internal functions for
632 gather loads. Recognize existing calls to a gather load function.
633 (vect_analyze_data_refs): Consider using gather loads if
634 supports_vec_gather_load_p.
635 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
636 (vect_get_gather_scatter_offset_type): Likewise.
637 (vect_convert_mask_for_vectype): Likewise.
638 (vect_add_conversion_to_patterm): Likewise.
639 (vect_try_gather_scatter_pattern): Likewise.
640 (vect_recog_gather_scatter_pattern): New pattern recognizer.
641 (vect_vect_recog_func_ptrs): Add it.
642 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
643 internal_fn_mask_index and internal_gather_scatter_fn_p.
644 (check_load_store_masking): Take the gather_scatter_info as an
645 argument and handle gather loads.
646 (vect_get_gather_scatter_ops): New function.
647 (vectorizable_call): Check internal_load_fn_p.
648 (vectorizable_load): Likewise. Handle gather load internal
650 (vectorizable_store): Update call to check_load_store_masking.
651 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
652 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
653 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
654 (aarch64_gather_scale_operand_d): New predicates.
655 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
656 (mask_gather_load<mode>): New insns.
658 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
659 Alan Hayward <alan.hayward@arm.com>
660 David Sherwood <david.sherwood@arm.com>
662 * optabs.def (fold_left_plus_optab): New optab.
663 * doc/md.texi (fold_left_plus_@var{m}): Document.
664 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
665 * internal-fn.c (fold_left_direct): Define.
666 (expand_fold_left_optab_fn): Likewise.
667 (direct_fold_left_optab_supported_p): Likewise.
668 * fold-const-call.c (fold_const_fold_left): New function.
669 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
670 * tree-parloops.c (valid_reduction_p): New function.
671 (gather_scalar_reductions): Use it.
672 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
673 (vect_finish_replace_stmt): Declare.
674 * tree-vect-loop.c (fold_left_reduction_fn): New function.
675 (needs_fold_left_reduction_p): New function, split out from...
676 (vect_is_simple_reduction): ...here. Accept reductions that
677 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
678 (vect_force_simple_reduction): Also store the reduction type in
679 the assignment's STMT_VINFO_REDUC_TYPE.
680 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
681 (merge_with_identity): New function.
682 (vect_expand_fold_left): Likewise.
683 (vectorize_fold_left_reduction): Likewise.
684 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
685 scalar phi in place for it. Check for target support and reject
686 cases that would reassociate the operation. Defer the transform
687 phase to vectorize_fold_left_reduction.
688 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
689 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
690 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
692 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
694 * tree-if-conv.c (predicate_mem_writes): Remove redundant
695 call to ifc_temp_var.
697 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
698 Alan Hayward <alan.hayward@arm.com>
699 David Sherwood <david.sherwood@arm.com>
701 * target.def (legitimize_address_displacement): Take the original
702 offset as a poly_int.
703 * targhooks.h (default_legitimize_address_displacement): Update
705 * targhooks.c (default_legitimize_address_displacement): Likewise.
706 * doc/tm.texi: Regenerate.
707 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
708 as an argument, moving assert of ad->disp == ad->disp_term to...
709 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
710 Try calling targetm.legitimize_address_displacement before expanding
711 the address rather than afterwards, and adjust for the new interface.
712 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
713 Match the new hook interface. Handle SVE addresses.
714 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
717 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
719 * Makefile.in (OBJS): Add early-remat.o.
720 * target.def (select_early_remat_modes): New hook.
721 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
722 * doc/tm.texi: Regenerate.
723 * targhooks.h (default_select_early_remat_modes): Declare.
724 * targhooks.c (default_select_early_remat_modes): New function.
725 * timevar.def (TV_EARLY_REMAT): New timevar.
726 * passes.def (pass_early_remat): New pass.
727 * tree-pass.h (make_pass_early_remat): Declare.
728 * early-remat.c: New file.
729 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
731 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
733 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
734 Alan Hayward <alan.hayward@arm.com>
735 David Sherwood <david.sherwood@arm.com>
737 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
738 vfm1 with a bound_epilog parameter.
739 (vect_do_peeling): Update calls accordingly, and move the prologue
740 call earlier in the function. Treat the base bound_epilog as 0 for
741 fully-masked loops and retain vf - 1 for other loops. Add 1 to
742 this base when peeling for gaps.
743 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
744 with fully-masked loops.
745 (vect_estimate_min_profitable_iters): Handle the single peeled
746 iteration in that case.
748 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
749 Alan Hayward <alan.hayward@arm.com>
750 David Sherwood <david.sherwood@arm.com>
752 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
753 single-element interleaving even if the size is not a power of 2.
754 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
755 accesses for single-element interleaving if the group size is
758 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
759 Alan Hayward <alan.hayward@arm.com>
760 David Sherwood <david.sherwood@arm.com>
762 * doc/md.texi (fold_extract_last_@var{m}): Document.
763 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
764 * optabs.def (fold_extract_last_optab): New optab.
765 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
766 * internal-fn.c (fold_extract_direct): New macro.
767 (expand_fold_extract_optab_fn): Likewise.
768 (direct_fold_extract_optab_supported_p): Likewise.
769 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
770 * tree-vect-loop.c (vect_model_reduction_cost): Handle
771 EXTRACT_LAST_REDUCTION.
772 (get_initial_def_for_reduction): Do not create an initial vector
773 for EXTRACT_LAST_REDUCTION reductions.
774 (vectorizable_reduction): Leave the scalar phi in place for
775 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
776 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
777 epilogue code for EXTRACT_LAST_REDUCTION and defer the
778 transform phase to vectorizable_condition.
779 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
781 (vect_finish_stmt_generation): ...here.
782 (vect_finish_replace_stmt): New function.
783 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
784 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
786 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
788 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
789 Alan Hayward <alan.hayward@arm.com>
790 David Sherwood <david.sherwood@arm.com>
792 * doc/md.texi (extract_last_@var{m}): Document.
793 * optabs.def (extract_last_optab): New optab.
794 * internal-fn.def (EXTRACT_LAST): New internal function.
795 * internal-fn.c (cond_unary_direct): New macro.
796 (expand_cond_unary_optab_fn): Likewise.
797 (direct_cond_unary_optab_supported_p): Likewise.
798 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
799 loops using EXTRACT_LAST.
800 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
801 (extract_last_<mode>): ...this optab.
802 (vec_extract<mode><Vel>): Update accordingly.
804 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
805 Alan Hayward <alan.hayward@arm.com>
806 David Sherwood <david.sherwood@arm.com>
808 * target.def (empty_mask_is_expensive): New hook.
809 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
810 * doc/tm.texi: Regenerate.
811 * targhooks.h (default_empty_mask_is_expensive): Declare.
812 * targhooks.c (default_empty_mask_is_expensive): New function.
813 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
814 if the target says that empty masks are expensive.
815 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
817 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
819 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
820 Alan Hayward <alan.hayward@arm.com>
821 David Sherwood <david.sherwood@arm.com>
823 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
824 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
825 (vect_use_loop_mask_for_alignment_p): New function.
826 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
827 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
828 niters_skip argument. Make sure that the first niters_skip elements
829 of the first iteration are inactive.
830 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
831 Update call to vect_set_loop_masks_directly.
832 (get_misalign_in_elems): New function, split out from...
833 (vect_gen_prolog_loop_niters): ...here.
834 (vect_update_init_of_dr): Take a code argument that specifies whether
835 the adjustment should be added or subtracted.
836 (vect_update_init_of_drs): Likewise.
837 (vect_prepare_for_masked_peels): New function.
838 (vect_do_peeling): Skip prologue peeling if we're using a mask
839 instead. Update call to vect_update_inits_of_drs.
840 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
842 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
843 alignment. Do not include the number of peeled iterations in
844 the minimum threshold in that case.
845 (vectorizable_induction): Adjust the start value down by
846 LOOP_VINFO_MASK_SKIP_NITERS iterations.
847 (vect_transform_loop): Call vect_prepare_for_masked_peels.
848 Take the number of skipped iterations into account when calculating
850 * tree-vect-stmts.c (vect_gen_while_not): New function.
852 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
853 Alan Hayward <alan.hayward@arm.com>
854 David Sherwood <david.sherwood@arm.com>
856 * doc/sourcebuild.texi (vect_fully_masked): Document.
857 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
859 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
861 (vect_analyze_loop_2): ...here. Don't check the vectorization
862 factor against the number of loop iterations if the loop is
865 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
866 Alan Hayward <alan.hayward@arm.com>
867 David Sherwood <david.sherwood@arm.com>
869 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
870 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
871 (dump_groups): Update accordingly.
872 (iv_use::mem_type): New member variable.
873 (address_p): New function.
874 (record_use): Add a mem_type argument and initialize the new
876 (record_group_use): Add a mem_type argument. Use address_p.
877 Remove obsolete null checks of base_object. Update call to record_use.
878 (find_interesting_uses_op): Update call to record_group_use.
879 (find_interesting_uses_cond): Likewise.
880 (find_interesting_uses_address): Likewise.
881 (get_mem_type_for_internal_fn): New function.
882 (find_address_like_use): Likewise.
883 (find_interesting_uses_stmt): Try find_address_like_use before
884 calling find_interesting_uses_op.
885 (addr_offset_valid_p): Use the iv mem_type field as the type
886 of the addressed memory.
887 (add_autoinc_candidates): Likewise.
888 (get_address_cost): Likewise.
889 (split_small_address_groups_p): Use address_p.
890 (split_address_groups): Likewise.
891 (add_iv_candidate_for_use): Likewise.
892 (autoinc_possible_for_pair): Likewise.
893 (rewrite_groups): Likewise.
894 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
895 (determine_group_iv_cost): Update after split of USE_ADDRESS.
896 (get_alias_ptr_type_for_ptr_address): New function.
897 (rewrite_use_address): Rewrite address uses in calls that were
898 identified by find_address_like_use.
900 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
901 Alan Hayward <alan.hayward@arm.com>
902 David Sherwood <david.sherwood@arm.com>
904 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
906 * gimple-expr.h (is_gimple_addressable: Likewise.
907 * gimple-expr.c (is_gimple_address): Likewise.
908 * internal-fn.c (expand_call_mem_ref): New function.
909 (expand_mask_load_optab_fn): Use it.
910 (expand_mask_store_optab_fn): Likewise.
912 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
913 Alan Hayward <alan.hayward@arm.com>
914 David Sherwood <david.sherwood@arm.com>
916 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
917 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
918 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
919 (cond_umax@var{mode}): Document.
920 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
921 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
922 (cond_umin_optab, cond_umax_optab): New optabs.
923 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
924 (COND_IOR, COND_XOR): New internal functions.
925 * internal-fn.h (get_conditional_internal_fn): Declare.
926 * internal-fn.c (cond_binary_direct): New macro.
927 (expand_cond_binary_optab_fn): Likewise.
928 (direct_cond_binary_optab_supported_p): Likewise.
929 (get_conditional_internal_fn): New function.
930 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
931 Cope with reduction statements that are vectorized as calls rather
933 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
934 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
935 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
936 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
937 (UNSPEC_COND_EOR): New unspecs.
938 (optab): Add mappings for them.
939 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
940 (sve_int_op, sve_fp_op): New int attributes.
942 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
943 Alan Hayward <alan.hayward@arm.com>
944 David Sherwood <david.sherwood@arm.com>
946 * optabs.def (while_ult_optab): New optab.
947 * doc/md.texi (while_ult@var{m}@var{n}): Document.
948 * internal-fn.def (WHILE_ULT): New internal function.
949 * internal-fn.h (direct_internal_fn_supported_p): New override
950 that takes two types as argument.
951 * internal-fn.c (while_direct): New macro.
952 (expand_while_optab_fn): New function.
953 (convert_optab_supported_p): Likewise.
954 (direct_while_optab_supported_p): New macro.
955 * wide-int.h (wi::udiv_ceil): New function.
956 * tree-vectorizer.h (rgroup_masks): New structure.
957 (vec_loop_masks): New typedef.
958 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
960 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
961 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
962 (vect_max_vf): New function.
963 (slpeel_make_loop_iterate_ntimes): Delete.
964 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
965 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
966 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
967 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
968 internal-fn.h, stor-layout.h and optabs-query.h.
969 (vect_set_loop_mask): New function.
970 (add_preheader_seq): Likewise.
971 (add_header_seq): Likewise.
972 (interleave_supported_p): Likewise.
973 (vect_maybe_permute_loop_masks): Likewise.
974 (vect_set_loop_masks_directly): Likewise.
975 (vect_set_loop_condition_masked): Likewise.
976 (vect_set_loop_condition_unmasked): New function, split out from
977 slpeel_make_loop_iterate_ntimes.
978 (slpeel_make_loop_iterate_ntimes): Rename to..
979 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
980 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
981 (vect_do_peeling): Update call accordingly.
982 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
984 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
985 mask_compare_type, can_fully_mask_p and fully_masked_p.
986 (release_vec_loop_masks): New function.
987 (_loop_vec_info): Use it to free the loop masks.
988 (can_produce_all_loop_masks_p): New function.
989 (vect_get_max_nscalars_per_iter): Likewise.
990 (vect_verify_full_masking): Likewise.
991 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
992 retries, and free the mask rgroups before retrying. Check loop-wide
993 reasons for disallowing fully-masked loops. Make the final decision
994 about whether use a fully-masked loop or not.
995 (vect_estimate_min_profitable_iters): Do not assume that peeling
996 for the number of iterations will be needed for fully-masked loops.
997 (vectorizable_reduction): Disable fully-masked loops.
998 (vectorizable_live_operation): Likewise.
999 (vect_halve_mask_nunits): New function.
1000 (vect_double_mask_nunits): Likewise.
1001 (vect_record_loop_mask): Likewise.
1002 (vect_get_loop_mask): Likewise.
1003 (vect_transform_loop): Handle the case in which the final loop
1004 iteration might handle a partial vector. Call vect_set_loop_condition
1005 instead of slpeel_make_loop_iterate_ntimes.
1006 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1007 (check_load_store_masking): New function.
1008 (prepare_load_store_mask): Likewise.
1009 (vectorizable_store): Handle fully-masked loops.
1010 (vectorizable_load): Likewise.
1011 (supportable_widening_operation): Use vect_halve_mask_nunits for
1013 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1014 (vect_gen_while): New function.
1015 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1016 (aarch64_uqdec<mode>): New insn.
1018 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1019 Alan Hayward <alan.hayward@arm.com>
1020 David Sherwood <david.sherwood@arm.com>
1022 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1023 (reduc_xor_scal_optab): New optabs.
1024 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1025 (reduc_xor_scal_@var{m}): Document.
1026 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1027 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1029 * fold-const-call.c (fold_const_call): Handle them.
1030 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1031 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1032 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1033 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1034 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1035 (UNSPEC_XORV): New unspecs.
1036 (optab): Add entries for them.
1037 (BITWISEV): New int iterator.
1038 (bit_reduc_op): New int attributes.
1040 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1041 Alan Hayward <alan.hayward@arm.com>
1042 David Sherwood <david.sherwood@arm.com>
1044 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1045 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1046 * optabs.def (vec_shl_insert_optab): New optab.
1047 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1048 (duplicate_and_interleave): Likewise.
1049 * tree-vect-loop.c: Include internal-fn.h.
1050 (neutral_op_for_slp_reduction): New function, split out from
1051 get_initial_defs_for_reduction.
1052 (get_initial_def_for_reduction): Handle option 2 for variable-length
1053 vectors by loading the neutral value into a vector and then shifting
1054 the initial value into element 0.
1055 (get_initial_defs_for_reduction): Replace the code argument with
1056 the neutral value calculated by neutral_op_for_slp_reduction.
1057 Use gimple_build_vector for constant-length vectors.
1058 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1059 but the first group_size elements have a neutral value.
1060 Use duplicate_and_interleave otherwise.
1061 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1062 Update call to get_initial_defs_for_reduction. Handle SLP
1063 reductions for variable-length vectors by creating one vector
1064 result for each scalar result, with the elements associated
1065 with other scalar results stubbed out with the neutral value.
1066 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1067 Require IFN_VEC_SHL_INSERT for double reductions on
1068 variable-length vectors, or SLP reductions that have
1069 a neutral value. Require can_duplicate_and_interleave_p
1070 support for variable-length unchained SLP reductions if there
1071 is no neutral value, such as for MIN/MAX reductions. Also require
1072 the number of vector elements to be a multiple of the number of
1073 SLP statements when doing variable-length unchained SLP reductions.
1074 Update call to vect_create_epilog_for_reduction.
1075 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1076 and remove initial values.
1077 (duplicate_and_interleave): Make public.
1078 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1079 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1081 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1082 Alan Hayward <alan.hayward@arm.com>
1083 David Sherwood <david.sherwood@arm.com>
1085 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1086 (can_duplicate_and_interleave_p): New function.
1087 (vect_get_and_check_slp_defs): Take the vector of statements
1088 rather than just the current one. Remove excess parentheses.
1089 Restriction rejectinon of vect_constant_def and vect_external_def
1090 for variable-length vectors to boolean types, or types for which
1091 can_duplicate_and_interleave_p is false.
1092 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1093 (duplicate_and_interleave): New function.
1094 (vect_get_constant_vectors): Use gimple_build_vector for
1095 constant-length vectors and suitable variable-length constant
1096 vectors. Use duplicate_and_interleave for other variable-length
1097 vectors. Don't defer the update when inserting new statements.
1099 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1100 Alan Hayward <alan.hayward@arm.com>
1101 David Sherwood <david.sherwood@arm.com>
1103 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1104 min_profitable_iters doesn't go negative.
1106 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1107 Alan Hayward <alan.hayward@arm.com>
1108 David Sherwood <david.sherwood@arm.com>
1110 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1111 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1112 * optabs.def (vec_mask_load_lanes_optab): New optab.
1113 (vec_mask_store_lanes_optab): Likewise.
1114 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1115 (MASK_STORE_LANES): Likewise.
1116 * internal-fn.c (mask_load_lanes_direct): New macro.
1117 (mask_store_lanes_direct): Likewise.
1118 (expand_mask_load_optab_fn): Handle masked operations.
1119 (expand_mask_load_lanes_optab_fn): New macro.
1120 (expand_mask_store_optab_fn): Handle masked operations.
1121 (expand_mask_store_lanes_optab_fn): New macro.
1122 (direct_mask_load_lanes_optab_supported_p): Likewise.
1123 (direct_mask_store_lanes_optab_supported_p): Likewise.
1124 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1126 (vect_load_lanes_supported): Likewise.
1127 * tree-vect-data-refs.c (strip_conversion): New function.
1128 (can_group_stmts_p): Likewise.
1129 (vect_analyze_data_ref_accesses): Use it instead of checking
1130 for a pair of assignments.
1131 (vect_store_lanes_supported): Take a masked_p parameter.
1132 (vect_load_lanes_supported): Likewise.
1133 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1134 vect_store_lanes_supported and vect_load_lanes_supported.
1135 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1136 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1137 parameter. Don't allow gaps for masked accesses.
1138 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1139 and vect_load_lanes_supported.
1140 (get_load_store_type): Take a masked_p parameter and update
1141 call to get_group_load_store_type.
1142 (vectorizable_store): Update call to get_load_store_type.
1143 Handle IFN_MASK_STORE_LANES.
1144 (vectorizable_load): Update call to get_load_store_type.
1145 Handle IFN_MASK_LOAD_LANES.
1147 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1148 Alan Hayward <alan.hayward@arm.com>
1149 David Sherwood <david.sherwood@arm.com>
1151 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1153 * config/aarch64/aarch64-protos.h
1154 (aarch64_sve_struct_memory_operand_p): Declare.
1155 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1156 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1157 (VPRED, vpred): Handle SVE structure modes.
1158 * config/aarch64/constraints.md (Utx): New constraint.
1159 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1160 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1161 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1162 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1163 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1164 structure modes. Split into pieces after RA.
1165 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1166 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1168 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1169 SVE structure modes.
1170 (aarch64_classify_address): Likewise.
1171 (sizetochar): Move earlier in file.
1172 (aarch64_print_operand): Handle SVE register lists.
1173 (aarch64_array_mode): New function.
1174 (aarch64_sve_struct_memory_operand_p): Likewise.
1175 (TARGET_ARRAY_MODE): Redefine.
1177 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1178 Alan Hayward <alan.hayward@arm.com>
1179 David Sherwood <david.sherwood@arm.com>
1181 * target.def (array_mode): New target hook.
1182 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1183 * doc/tm.texi: Regenerate.
1184 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1185 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1186 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1188 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1191 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1192 Alan Hayward <alan.hayward@arm.com>
1193 David Sherwood <david.sherwood@arm.com>
1195 * fold-const.c (fold_binary_loc): Check the argument types
1196 rather than the result type when testing for a vector operation.
1198 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1200 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1201 * doc/tm.texi: Regenerate.
1203 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1204 Alan Hayward <alan.hayward@arm.com>
1205 David Sherwood <david.sherwood@arm.com>
1207 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1208 (sve): Document new AArch64 extension.
1209 * doc/md.texi (w): Extend the description of the AArch64
1210 constraint to include SVE vectors.
1211 (Upl, Upa): Document new AArch64 predicate constraints.
1212 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1214 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1215 (msve-vector-bits=): New option.
1216 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1217 SVE when these are disabled.
1218 (sve): New extension.
1219 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1220 modes. Adjust their number of units based on aarch64_sve_vg.
1221 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1222 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1223 aarch64_addr_query_type.
1224 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1225 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1226 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1227 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1228 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1229 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1230 (aarch64_simd_imm_zero_p): Delete.
1231 (aarch64_check_zero_based_sve_index_immediate): Declare.
1232 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1233 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1234 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1235 (aarch64_sve_float_mul_immediate_p): Likewise.
1236 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1238 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1239 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1240 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1241 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1242 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1243 (aarch64_regmode_natural_size): Likewise.
1244 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1245 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1247 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1248 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1249 for VG and the SVE predicate registers.
1250 (V_ALIASES): Add a "z"-prefixed alias.
1251 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1252 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1253 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1254 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1255 (REG_CLASS_NAMES): Add entries for them.
1256 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1257 and the predicate registers.
1258 (aarch64_sve_vg): Declare.
1259 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1260 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1261 (REGMODE_NATURAL_SIZE): Define.
1262 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1264 * config/aarch64/aarch64.c: Include cfgrtl.h.
1265 (simd_immediate_info): Add a constructor for series vectors,
1266 and an associated step field.
1267 (aarch64_sve_vg): New variable.
1268 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1269 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1270 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1271 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1272 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1273 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1274 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1275 (aarch64_get_mask_mode): New functions.
1276 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1277 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1278 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1279 predicate modes and predicate registers. Explicitly restrict
1280 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1281 to store a vector mode if it is recognized by
1282 aarch64_classify_vector_mode.
1283 (aarch64_regmode_natural_size): New function.
1284 (aarch64_hard_regno_caller_save_mode): Return the original mode
1286 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1287 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1288 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1289 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1291 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1292 does not overlap dest if the function is frame-related. Handle
1294 (aarch64_split_add_offset): New function.
1295 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1296 them aarch64_add_offset.
1297 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1298 and update call to aarch64_sub_sp.
1299 (aarch64_add_cfa_expression): New function.
1300 (aarch64_expand_prologue): Pass extra temporary registers to the
1301 functions above. Handle the case in which we need to emit new
1302 DW_CFA_expressions for registers that were originally saved
1303 relative to the stack pointer, but now have to be expressed
1304 relative to the frame pointer.
1305 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1307 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1308 IP0 and IP1 values for SVE frames.
1309 (aarch64_expand_vec_series): New function.
1310 (aarch64_expand_sve_widened_duplicate): Likewise.
1311 (aarch64_expand_sve_const_vector): Likewise.
1312 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1313 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1314 into the register, rather than emitting a SET directly.
1315 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1316 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1317 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1318 (offset_9bit_signed_scaled_p): New functions.
1319 (aarch64_replicate_bitmask_imm): New function.
1320 (aarch64_bitmask_imm): Use it.
1321 (aarch64_cannot_force_const_mem): Reject expressions involving
1322 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1323 (aarch64_classify_index): Handle SVE indices, by requiring
1324 a plain register index with a scale that matches the element size.
1325 (aarch64_classify_address): Handle SVE addresses. Assert that
1326 the mode of the address is VOIDmode or an integer mode.
1327 Update call to aarch64_classify_symbol.
1328 (aarch64_classify_symbolic_expression): Update call to
1329 aarch64_classify_symbol.
1330 (aarch64_const_vec_all_in_range_p): New function.
1331 (aarch64_print_vector_float_operand): Likewise.
1332 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1333 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1334 and the FP immediates 1.0 and 0.5.
1335 (aarch64_print_address_internal): Handle SVE addresses.
1336 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1337 (aarch64_regno_regclass): Handle predicate registers.
1338 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1340 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1341 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1342 (aarch64_convert_sve_vector_bits): New function.
1343 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1344 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1346 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1347 Handle SVE vector and predicate modes. Accept VL-based constants
1348 that need only one temporary register, and VL offsets that require
1349 no temporary registers.
1350 (aarch64_conditional_register_usage): Mark the predicate registers
1351 as fixed if SVE isn't available.
1352 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1353 Return true for SVE vector and predicate modes.
1354 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1355 rather than an unsigned int. Handle SVE modes.
1356 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1358 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1360 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1361 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1362 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1363 (aarch64_sve_float_mul_immediate_p): New functions.
1364 (aarch64_sve_valid_immediate): New function.
1365 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1366 Explicitly reject structure modes. Check for INDEX constants.
1367 Handle PTRUE and PFALSE constants.
1368 (aarch64_check_zero_based_sve_index_immediate): New function.
1369 (aarch64_simd_imm_zero_p): Delete.
1370 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1371 vector modes. Accept constants in the range of CNT[BHWD].
1372 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1373 ask for an Advanced SIMD mode.
1374 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1375 (aarch64_simd_vector_alignment): Handle SVE predicates.
1376 (aarch64_vectorize_preferred_vector_alignment): New function.
1377 (aarch64_simd_vector_alignment_reachable): Use it instead of
1379 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1380 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1382 (MAX_VECT_LEN): Delete.
1383 (expand_vec_perm_d): Add a vec_flags field.
1384 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1385 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1386 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1388 (aarch64_evpc_rev): Rename to...
1389 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1390 (aarch64_evpc_rev_global): New function.
1391 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1392 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1394 (aarch64_evpc_sve_tbl): New function.
1395 (aarch64_expand_vec_perm_const_1): Update after rename of
1396 aarch64_evpc_rev. Handle SVE permutes too, trying
1397 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1398 than aarch64_evpc_tbl.
1399 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1400 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1401 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1402 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1403 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1404 (aarch64_expand_sve_vcond): New functions.
1405 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1406 of aarch64_vector_mode_p.
1407 (aarch64_dwarf_poly_indeterminate_value): New function.
1408 (aarch64_compute_pressure_classes): Likewise.
1409 (aarch64_can_change_mode_class): Likewise.
1410 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1411 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1412 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1413 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1414 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1415 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1416 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1417 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1419 (Dn, Dl, Dr): Accept const as well as const_vector.
1420 (Dz): Likewise. Compare against CONST0_RTX.
1421 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1422 of "vector" where appropriate.
1423 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1424 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1425 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1426 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1427 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1428 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1429 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1430 (v_int_equiv): Extend to SVE modes.
1431 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1433 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1434 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1435 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1436 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1437 (SVE_COND_FP_CMP): New int iterators.
1438 (perm_hilo): Handle the new unpack unspecs.
1439 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1441 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1442 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1443 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1444 (aarch64_equality_operator, aarch64_constant_vector_operand)
1445 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1446 (aarch64_sve_nonimmediate_operand): Likewise.
1447 (aarch64_sve_general_operand): Likewise.
1448 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1449 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1450 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1451 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1452 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1453 (aarch64_sve_float_arith_immediate): Likewise.
1454 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1455 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1456 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1457 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1458 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1459 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1460 (aarch64_sve_float_arith_operand): Likewise.
1461 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1462 (aarch64_sve_float_mul_operand): Likewise.
1463 (aarch64_sve_vec_perm_operand): Likewise.
1464 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1465 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1466 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1467 as well as const_vector.
1468 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1469 in file. Use CONST0_RTX and CONSTM1_RTX.
1470 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1471 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1472 Use aarch64_simd_imm_zero.
1473 * config/aarch64/aarch64-sve.md: New file.
1474 * config/aarch64/aarch64.md: Include it.
1475 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1476 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1477 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1478 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1479 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1480 (sve): New attribute.
1481 (enabled): Disable instructions with the sve attribute unless
1483 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1484 aarch64_expand_mov_immediate.
1485 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1486 CNT[BHSD] immediates.
1487 (movti): Split CONST_POLY_INT moves into two halves.
1488 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1489 Split additions that need a temporary here if the destination
1490 is the stack pointer.
1491 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1492 (*add<mode>3_poly_1): New instruction.
1493 (set_clobber_cc): New expander.
1495 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1497 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1498 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1499 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1500 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1501 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1502 Change innermode from fixed_mode_size to machine_mode.
1503 (simplify_subreg): Update call accordingly. Handle a constant-sized
1504 subreg of a variable-length CONST_VECTOR.
1506 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1507 Alan Hayward <alan.hayward@arm.com>
1508 David Sherwood <david.sherwood@arm.com>
1510 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1511 (add_offset_to_base): New function, split out from...
1512 (create_mem_ref): ...here. When handling a scale other than 1,
1513 check first whether the address is valid without the offset.
1514 Add it into the base if so, leaving the index and scale as-is.
1516 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1519 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1520 fold_for_warn before checking if arg2 is INTEGER_CST.
1522 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1524 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1525 (store_multiple_operation): Delete.
1526 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1527 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1528 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1529 guarded by TARGET_STRING.
1530 (rs6000_output_load_multiple): Delete.
1531 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1532 OPTION_MASK_STRING / TARGET_STRING handling.
1533 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1534 (const rs6000_opt_masks) <"string">: Change mask to 0.
1535 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1536 (MASK_STRING): Delete.
1537 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1539 (load_multiple): Delete.
1546 (store_multiple): Delete.
1553 (movmemsi_8reg): Delete.
1554 (corresponding unnamed define_insn): Delete.
1555 (movmemsi_6reg): Delete.
1556 (corresponding unnamed define_insn): Delete.
1557 (movmemsi_4reg): Delete.
1558 (corresponding unnamed define_insn): Delete.
1559 (movmemsi_2reg): Delete.
1560 (corresponding unnamed define_insn): Delete.
1561 (movmemsi_1reg): Delete.
1562 (corresponding unnamed define_insn): Delete.
1563 * config/rs6000/rs6000.opt (mno-string): New.
1564 (mstring): Replace by deprecation warning stub.
1565 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1567 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1569 * regrename.c (regrename_do_replace): If replacing the same
1570 reg multiple times, try to reuse last created gen_raw_REG.
1573 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1574 main to workaround a bug in GDB.
1576 2018-01-12 Tom de Vries <tom@codesourcery.com>
1579 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1581 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1583 PR rtl-optimization/80481
1584 * ira-color.c (get_cap_member): New function.
1585 (allocnos_conflict_by_live_ranges_p): Use it.
1586 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1587 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1589 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1592 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1593 (*saddl_se_1): Ditto.
1595 (*saddl_se_1): Ditto.
1597 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1599 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1600 rather than wi::to_widest for DR_INITs.
1601 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1602 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1603 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1605 (vect_analyze_group_access_1): Note that here.
1607 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1609 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1610 polynomial type sizes.
1612 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1614 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1615 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1616 (gimple_add_tmp_var): Likewise.
1618 2018-01-12 Martin Liska <mliska@suse.cz>
1620 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1621 (gimple_alloc_sizes): Likewise.
1622 (dump_gimple_statistics): Use PRIu64 in printf format.
1623 * gimple.h: Change uint64_t to int.
1625 2018-01-12 Martin Liska <mliska@suse.cz>
1627 * tree-core.h: Use uint64_t instead of int.
1628 * tree.c (tree_node_counts): Likewise.
1629 (tree_node_sizes): Likewise.
1630 (dump_tree_statistics): Use PRIu64 in printf format.
1632 2018-01-12 Martin Liska <mliska@suse.cz>
1634 * Makefile.in: As qsort_chk is implemented in vec.c, add
1635 vec.o to linkage of gencfn-macros.
1636 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1637 passing the info to record_node_allocation_statistics.
1638 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1640 * ggc-common.c (struct ggc_usage): Add operator== and use
1641 it in operator< and compare function.
1642 * mem-stats.h (struct mem_usage): Likewise.
1643 * vec.c (struct vec_usage): Remove operator< and compare
1644 function. Can be simply inherited.
1646 2018-01-12 Martin Jambor <mjambor@suse.cz>
1649 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1650 * tree-ssa-math-opts.c: Include domwalk.h.
1651 (convert_mult_to_fma_1): New function.
1652 (fma_transformation_info): New type.
1653 (fma_deferring_state): Likewise.
1654 (cancel_fma_deferring): New function.
1655 (result_of_phi): Likewise.
1656 (last_fma_candidate_feeds_initial_phi): Likewise.
1657 (convert_mult_to_fma): Added deferring logic, split actual
1658 transformation to convert_mult_to_fma_1.
1659 (math_opts_dom_walker): New type.
1660 (math_opts_dom_walker::after_dom_children): New method, body moved
1661 here from pass_optimize_widening_mul::execute, added deferring logic
1663 (pass_optimize_widening_mul::execute): Moved most of code to
1664 math_opts_dom_walker::after_dom_children.
1665 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1666 * config/i386/i386.c (ix86_option_override_internal): Added
1667 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1669 2018-01-12 Richard Biener <rguenther@suse.de>
1672 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1673 inline instance vars.
1675 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1678 * config/rx/rx.c (rx_is_restricted_memory_address):
1681 2018-01-12 Richard Biener <rguenther@suse.de>
1683 PR tree-optimization/80846
1684 * target.def (split_reduction): New target hook.
1685 * targhooks.c (default_split_reduction): New function.
1686 * targhooks.h (default_split_reduction): Declare.
1687 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1688 target requests first reduce vectors by combining low and high
1690 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1691 (get_vectype_for_scalar_type_and_size): Export.
1692 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1693 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1694 * doc/tm.texi: Regenerate.
1695 * config/i386/i386.c (ix86_split_reduction): Implement
1696 TARGET_VECTORIZE_SPLIT_REDUCTION.
1698 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1701 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1702 in PIC mode except for TARGET_VXWORKS_RTP.
1703 * config/sparc/sparc.c: Include cfgrtl.h.
1704 (TARGET_INIT_PIC_REG): Define.
1705 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1706 (sparc_pic_register_p): New predicate.
1707 (sparc_legitimate_address_p): Use it.
1708 (sparc_legitimize_pic_address): Likewise.
1709 (sparc_delegitimize_address): Likewise.
1710 (sparc_mode_dependent_address_p): Likewise.
1711 (gen_load_pcrel_sym): Remove 4th parameter.
1712 (load_got_register): Adjust call to above. Remove obsolete stuff.
1713 (sparc_expand_prologue): Do not call load_got_register here.
1714 (sparc_flat_expand_prologue): Likewise.
1715 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1716 (sparc_use_pseudo_pic_reg): New function.
1717 (sparc_init_pic_reg): Likewise.
1718 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1719 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1721 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1723 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1724 Add item for branch_cost.
1726 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1728 PR rtl-optimization/83565
1729 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1730 not extend the result to a larger mode for rotate operations.
1731 (num_sign_bit_copies1): Likewise.
1733 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1736 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1738 Use values-Xc.o for -pedantic.
1739 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1741 2018-01-12 Martin Liska <mliska@suse.cz>
1744 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1746 (possible_polymorphic_call_targets): Use it.
1747 (ipa_devirt): Likewise.
1749 2018-01-12 Martin Liska <mliska@suse.cz>
1751 * profile-count.h (enum profile_quality): Use 0 as invalid
1752 enum value of profile_quality.
1754 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1756 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1757 -mext-string options.
1759 2018-01-12 Richard Biener <rguenther@suse.de>
1761 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1762 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1763 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1765 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1767 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1769 * configure.ac (--with-long-double-format): Add support for the
1770 configuration option to change the default long double format on
1772 * config.gcc (powerpc*-linux*-*): Likewise.
1773 * configure: Regenerate.
1774 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1775 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1776 used without modification.
1778 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1780 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1781 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1782 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1783 MISC_BUILTIN_SPEC_BARRIER.
1784 (rs6000_init_builtins): Likewise.
1785 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1787 (speculation_barrier): New define_insn.
1788 * doc/extend.texi: Document __builtin_speculation_barrier.
1790 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1793 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1794 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1795 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1797 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1798 integral modes instead of "ss" and "sd".
1799 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1800 vectors with 32-bit and 64-bit elements.
1801 (vecdupssescalarmodesuffix): New mode attribute.
1802 (vec_dup<mode>): Use it.
1804 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1807 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1808 frame if argument is passed on stack.
1810 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1813 * ree.c (combine_reaching_defs): Optimize also
1814 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1815 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1817 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1820 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1822 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1825 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1826 after they are computed.
1828 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1830 PR tree-optimization/83695
1831 * gimple-loop-linterchange.cc
1832 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1833 reset cached scev information after interchange.
1834 (pass_linterchange::execute): Remove call to scev_reset_htab.
1836 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1838 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1839 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1840 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1841 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1842 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1843 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1844 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1845 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1846 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1847 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1848 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1849 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1850 (V_lane_reg): Likewise.
1851 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1853 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1854 (vfmal_lane_low<mode>_intrinsic,
1855 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1856 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1857 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1858 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1859 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1860 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1862 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1864 * config/arm/arm-cpus.in (fp16fml): New feature.
1865 (ALL_SIMD): Add fp16fml.
1866 (armv8.2-a): Add fp16fml as an option.
1867 (armv8.3-a): Likewise.
1868 (armv8.4-a): Add fp16fml as part of fp16.
1869 * config/arm/arm.h (TARGET_FP16FML): Define.
1870 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1872 * config/arm/arm-modes.def (V2HF): Define.
1873 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1874 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1875 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1876 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1877 vfmsl_low, vfmsl_high): New set of builtins.
1878 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1879 (vfml_op): New code attribute.
1880 (VFMLHALVES): New int iterator.
1881 (VFML, VFMLSEL): New mode attributes.
1882 (V_reg): Define mapping for V2HF.
1883 (V_hi, V_lo): New mode attributes.
1884 (VF_constraint): Likewise.
1885 (vfml_half, vfml_half_selector): New int attributes.
1886 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1888 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1889 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1891 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1892 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1893 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
1894 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
1896 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
1897 Document new effective target and option set.
1899 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1901 * config/arm/arm-cpus.in (armv8_4): New feature.
1902 (ARMv8_4a): New fgroup.
1903 (armv8.4-a): New arch.
1904 * config/arm/arm-tables.opt: Regenerate.
1905 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
1906 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
1907 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
1908 Add matching rules for -march=armv8.4-a and extensions.
1909 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
1911 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
1914 * config/rx/rx.md (BW): New mode attribute.
1915 (sync_lock_test_and_setsi): Add mode suffix to insn output.
1917 2018-01-11 Richard Biener <rguenther@suse.de>
1919 PR tree-optimization/83435
1920 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
1921 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
1922 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
1924 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1925 Alan Hayward <alan.hayward@arm.com>
1926 David Sherwood <david.sherwood@arm.com>
1928 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
1930 (aarch64_classify_address): Initialize it. Track polynomial offsets.
1931 (aarch64_print_address_internal): Use it to check for a zero offset.
1933 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
1934 Alan Hayward <alan.hayward@arm.com>
1935 David Sherwood <david.sherwood@arm.com>
1937 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
1938 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
1939 Return a poly_int64 rather than a HOST_WIDE_INT.
1940 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
1941 rather than a HOST_WIDE_INT.
1942 * config/aarch64/aarch64.h (aarch64_frame): Protect with
1943 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
1944 hard_fp_offset, frame_size, initial_adjust, callee_offset and
1945 final_offset from HOST_WIDE_INT to poly_int64.
1946 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
1947 to_constant when getting the number of units in an Advanced SIMD
1949 (aarch64_builtin_vectorized_function): Check for a constant number
1951 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
1953 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
1954 attribute instead of GET_MODE_NUNITS.
1955 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
1956 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
1957 GET_MODE_SIZE for fixed-size registers.
1958 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
1959 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
1960 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
1961 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
1962 (aarch64_print_operand, aarch64_print_address_internal)
1963 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
1964 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
1965 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
1966 Handle polynomial GET_MODE_SIZE.
1967 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
1968 wider than SImode without modification.
1969 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
1970 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
1971 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
1972 passing and returning SVE modes.
1973 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
1974 rather than GEN_INT.
1975 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
1976 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
1977 (aarch64_allocate_and_probe_stack_space): Likewise.
1978 (aarch64_layout_frame): Cope with polynomial offsets.
1979 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
1980 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
1982 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
1983 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
1984 poly_int64 rather than a HOST_WIDE_INT.
1985 (aarch64_get_separate_components, aarch64_process_components)
1986 (aarch64_expand_prologue, aarch64_expand_epilogue)
1987 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
1988 (aarch64_anchor_offset): New function, split out from...
1989 (aarch64_legitimize_address): ...here.
1990 (aarch64_builtin_vectorization_cost): Handle polynomial
1991 TYPE_VECTOR_SUBPARTS.
1992 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
1994 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
1995 number of elements from the PARALLEL rather than the mode.
1996 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
1997 rather than GET_MODE_BITSIZE.
1998 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
1999 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2000 (aarch64_expand_vec_perm_const_1): Handle polynomial
2001 d->perm.length () and d->perm elements.
2002 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2003 Apply to_constant to d->perm elements.
2004 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2005 polynomial CONST_VECTOR_NUNITS.
2006 (aarch64_move_pointer): Take amount as a poly_int64 rather
2008 (aarch64_progress_pointer): Avoid temporary variable.
2009 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2010 the mode attribute instead of GET_MODE.
2012 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2013 Alan Hayward <alan.hayward@arm.com>
2014 David Sherwood <david.sherwood@arm.com>
2016 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2017 x exists before using it.
2018 (aarch64_add_constant_internal): Rename to...
2019 (aarch64_add_offset_1): ...this. Replace regnum with separate
2020 src and dest rtxes. Handle the case in which they're different,
2021 including when the offset is zero. Replace scratchreg with an rtx.
2022 Use 2 additions if there is no spare register into which we can
2023 move a 16-bit constant.
2024 (aarch64_add_constant): Delete.
2025 (aarch64_add_offset): Replace reg with separate src and dest
2026 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2027 Use aarch64_add_offset_1.
2028 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2029 an rtx rather than an int. Take the delta as a poly_int64
2030 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2031 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2032 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2033 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2034 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2036 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2037 aarch64_add_constant.
2039 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2041 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2042 Use scalar_float_mode.
2044 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2046 * config/aarch64/aarch64-simd.md
2047 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2048 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2049 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2050 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2051 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2052 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2053 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2054 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2055 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2056 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2058 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2061 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2062 targ_options->x_arm_arch_string is non NULL.
2064 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2066 * config/aarch64/aarch64.h
2067 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2069 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2072 * expmed.c (emit_store_flag_force): Swap if const op0
2073 and change VOIDmode to mode of op0.
2075 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2077 PR rtl-optimization/83761
2078 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2079 than bytes to mode_for_size.
2081 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2084 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2085 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2088 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2091 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2092 when in layout mode.
2093 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2094 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2097 2018-01-10 Michael Collison <michael.collison@arm.com>
2099 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2100 * config/aarch64/aarch64-option-extension.def: Add
2101 AARCH64_OPT_EXTENSION of 'fp16fml'.
2102 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2103 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2104 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2105 * config/aarch64/constraints.md (Ui7): New constraint.
2106 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2107 (VFMLA_SEL_W): Ditto.
2110 (VFMLA16_LOW): New int iterator.
2111 (VFMLA16_HIGH): Ditto.
2112 (UNSPEC_FMLAL): New unspec.
2113 (UNSPEC_FMLSL): Ditto.
2114 (UNSPEC_FMLAL2): Ditto.
2115 (UNSPEC_FMLSL2): Ditto.
2116 (f16mac): New code attribute.
2117 * config/aarch64/aarch64-simd-builtins.def
2118 (aarch64_fmlal_lowv2sf): Ditto.
2119 (aarch64_fmlsl_lowv2sf): Ditto.
2120 (aarch64_fmlalq_lowv4sf): Ditto.
2121 (aarch64_fmlslq_lowv4sf): Ditto.
2122 (aarch64_fmlal_highv2sf): Ditto.
2123 (aarch64_fmlsl_highv2sf): Ditto.
2124 (aarch64_fmlalq_highv4sf): Ditto.
2125 (aarch64_fmlslq_highv4sf): Ditto.
2126 (aarch64_fmlal_lane_lowv2sf): Ditto.
2127 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2128 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2129 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2130 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2131 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2132 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2133 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2134 (aarch64_fmlal_lane_highv2sf): Ditto.
2135 (aarch64_fmlsl_lane_highv2sf): Ditto.
2136 (aarch64_fmlal_laneq_highv2sf): Ditto.
2137 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2138 (aarch64_fmlalq_lane_highv4sf): Ditto.
2139 (aarch64_fmlsl_lane_highv4sf): Ditto.
2140 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2141 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2142 * config/aarch64/aarch64-simd.md:
2143 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2144 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2145 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2146 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2147 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2148 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2149 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2150 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2151 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2152 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2153 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2154 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2155 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2156 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2157 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2158 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2159 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2160 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2161 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2162 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2163 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2164 (vfmlsl_low_u32): Ditto.
2165 (vfmlalq_low_u32): Ditto.
2166 (vfmlslq_low_u32): Ditto.
2167 (vfmlal_high_u32): Ditto.
2168 (vfmlsl_high_u32): Ditto.
2169 (vfmlalq_high_u32): Ditto.
2170 (vfmlslq_high_u32): Ditto.
2171 (vfmlal_lane_low_u32): Ditto.
2172 (vfmlsl_lane_low_u32): Ditto.
2173 (vfmlal_laneq_low_u32): Ditto.
2174 (vfmlsl_laneq_low_u32): Ditto.
2175 (vfmlalq_lane_low_u32): Ditto.
2176 (vfmlslq_lane_low_u32): Ditto.
2177 (vfmlalq_laneq_low_u32): Ditto.
2178 (vfmlslq_laneq_low_u32): Ditto.
2179 (vfmlal_lane_high_u32): Ditto.
2180 (vfmlsl_lane_high_u32): Ditto.
2181 (vfmlal_laneq_high_u32): Ditto.
2182 (vfmlsl_laneq_high_u32): Ditto.
2183 (vfmlalq_lane_high_u32): Ditto.
2184 (vfmlslq_lane_high_u32): Ditto.
2185 (vfmlalq_laneq_high_u32): Ditto.
2186 (vfmlslq_laneq_high_u32): Ditto.
2187 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2188 (AARCH64_FL_FOR_ARCH8_4): New.
2189 (AARCH64_ISA_F16FML): New ISA flag.
2190 (TARGET_F16FML): New feature flag for fp16fml.
2191 (doc/invoke.texi): Document new fp16fml option.
2193 2018-01-10 Michael Collison <michael.collison@arm.com>
2195 * config/aarch64/aarch64-builtins.c:
2196 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2197 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2198 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2199 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2200 (AARCH64_ISA_SHA3): New ISA flag.
2201 (TARGET_SHA3): New feature flag for sha3.
2202 * config/aarch64/iterators.md (sha512_op): New int attribute.
2203 (CRYPTO_SHA512): New int iterator.
2204 (UNSPEC_SHA512H): New unspec.
2205 (UNSPEC_SHA512H2): Ditto.
2206 (UNSPEC_SHA512SU0): Ditto.
2207 (UNSPEC_SHA512SU1): Ditto.
2208 * config/aarch64/aarch64-simd-builtins.def
2209 (aarch64_crypto_sha512hqv2di): New builtin.
2210 (aarch64_crypto_sha512h2qv2di): Ditto.
2211 (aarch64_crypto_sha512su0qv2di): Ditto.
2212 (aarch64_crypto_sha512su1qv2di): Ditto.
2213 (aarch64_eor3qv8hi): Ditto.
2214 (aarch64_rax1qv2di): Ditto.
2215 (aarch64_xarqv2di): Ditto.
2216 (aarch64_bcaxqv8hi): Ditto.
2217 * config/aarch64/aarch64-simd.md:
2218 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2219 (aarch64_crypto_sha512su0qv2di): Ditto.
2220 (aarch64_crypto_sha512su1qv2di): Ditto.
2221 (aarch64_eor3qv8hi): Ditto.
2222 (aarch64_rax1qv2di): Ditto.
2223 (aarch64_xarqv2di): Ditto.
2224 (aarch64_bcaxqv8hi): Ditto.
2225 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2226 (vsha512h2q_u64): Ditto.
2227 (vsha512su0q_u64): Ditto.
2228 (vsha512su1q_u64): Ditto.
2229 (veor3q_u16): Ditto.
2230 (vrax1q_u64): Ditto.
2232 (vbcaxq_u16): Ditto.
2233 * config/arm/types.md (crypto_sha512): New type attribute.
2234 (crypto_sha3): Ditto.
2235 (doc/invoke.texi): Document new sha3 option.
2237 2018-01-10 Michael Collison <michael.collison@arm.com>
2239 * config/aarch64/aarch64-builtins.c:
2240 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2241 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2242 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2243 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2244 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2245 (AARCH64_ISA_SM4): New ISA flag.
2246 (TARGET_SM4): New feature flag for sm4.
2247 * config/aarch64/aarch64-simd-builtins.def
2248 (aarch64_sm3ss1qv4si): Ditto.
2249 (aarch64_sm3tt1aq4si): Ditto.
2250 (aarch64_sm3tt1bq4si): Ditto.
2251 (aarch64_sm3tt2aq4si): Ditto.
2252 (aarch64_sm3tt2bq4si): Ditto.
2253 (aarch64_sm3partw1qv4si): Ditto.
2254 (aarch64_sm3partw2qv4si): Ditto.
2255 (aarch64_sm4eqv4si): Ditto.
2256 (aarch64_sm4ekeyqv4si): Ditto.
2257 * config/aarch64/aarch64-simd.md:
2258 (aarch64_sm3ss1qv4si): Ditto.
2259 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2260 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2261 (aarch64_sm4eqv4si): Ditto.
2262 (aarch64_sm4ekeyqv4si): Ditto.
2263 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2264 (sm3part_op): Ditto.
2265 (CRYPTO_SM3TT): Ditto.
2266 (CRYPTO_SM3PART): Ditto.
2267 (UNSPEC_SM3SS1): New unspec.
2268 (UNSPEC_SM3TT1A): Ditto.
2269 (UNSPEC_SM3TT1B): Ditto.
2270 (UNSPEC_SM3TT2A): Ditto.
2271 (UNSPEC_SM3TT2B): Ditto.
2272 (UNSPEC_SM3PARTW1): Ditto.
2273 (UNSPEC_SM3PARTW2): Ditto.
2274 (UNSPEC_SM4E): Ditto.
2275 (UNSPEC_SM4EKEY): Ditto.
2276 * config/aarch64/constraints.md (Ui2): New constraint.
2277 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2278 * config/arm/types.md (crypto_sm3): New type attribute.
2279 (crypto_sm4): Ditto.
2280 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2281 (vsm3tt1aq_u32): Ditto.
2282 (vsm3tt1bq_u32): Ditto.
2283 (vsm3tt2aq_u32): Ditto.
2284 (vsm3tt2bq_u32): Ditto.
2285 (vsm3partw1q_u32): Ditto.
2286 (vsm3partw2q_u32): Ditto.
2287 (vsm4eq_u32): Ditto.
2288 (vsm4ekeyq_u32): Ditto.
2289 (doc/invoke.texi): Document new sm4 option.
2291 2018-01-10 Michael Collison <michael.collison@arm.com>
2293 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2294 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2295 (AARCH64_FL_FOR_ARCH8_4): New.
2296 (AARCH64_FL_V8_4): New flag.
2297 (doc/invoke.texi): Document new armv8.4-a option.
2299 2018-01-10 Michael Collison <michael.collison@arm.com>
2301 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2302 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2303 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2304 * config/aarch64/aarch64-option-extension.def: Add
2305 AARCH64_OPT_EXTENSION of 'sha2'.
2306 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2307 (crypto): Disable sha2 and aes if crypto disabled.
2308 (crypto): Enable aes and sha2 if enabled.
2309 (simd): Disable sha2 and aes if simd disabled.
2310 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2312 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2313 (TARGET_SHA2): New feature flag for sha2.
2314 (TARGET_AES): New feature flag for aes.
2315 * config/aarch64/aarch64-simd.md:
2316 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2317 conditional on TARGET_AES.
2318 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2319 (aarch64_crypto_sha1hsi): Make pattern conditional
2321 (aarch64_crypto_sha1hv4si): Ditto.
2322 (aarch64_be_crypto_sha1hv4si): Ditto.
2323 (aarch64_crypto_sha1su1v4si): Ditto.
2324 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2325 (aarch64_crypto_sha1su0v4si): Ditto.
2326 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2327 (aarch64_crypto_sha256su0v4si): Ditto.
2328 (aarch64_crypto_sha256su1v4si): Ditto.
2329 (doc/invoke.texi): Document new aes and sha2 options.
2331 2018-01-10 Martin Sebor <msebor@redhat.com>
2333 PR tree-optimization/83781
2334 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2337 2018-01-11 Martin Sebor <msebor@gmail.com>
2338 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2340 PR tree-optimization/83501
2341 PR tree-optimization/81703
2343 * tree-ssa-strlen.c (get_string_cst): Rename...
2344 (get_string_len): ...to this. Handle global constants.
2345 (handle_char_store): Adjust.
2347 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2348 Jim Wilson <jimw@sifive.com>
2350 * config/riscv/riscv-protos.h (riscv_output_return): New.
2351 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2352 (riscv_attribute_table, riscv_output_return),
2353 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2354 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2355 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2357 (riscv_expand_prologue): Add early return for naked function.
2358 (riscv_expand_epilogue): Likewise.
2359 (riscv_function_ok_for_sibcall): Return false for naked function.
2360 (riscv_set_current_function): New.
2361 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2362 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2363 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2364 * doc/extend.texi (RISC-V Function Attributes): New.
2366 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2368 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2369 check for 128-bit long double before checking TCmode.
2370 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2371 128-bit long doubles before checking TFmode or TCmode.
2372 (FLOAT128_IBM_P): Likewise.
2374 2018-01-10 Martin Sebor <msebor@redhat.com>
2376 PR tree-optimization/83671
2377 * builtins.c (c_strlen): Unconditionally return zero for the empty
2379 Use -Warray-bounds for warnings.
2380 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2381 for non-constant array indices with COMPONENT_REF, arrays of
2382 arrays, and pointers to arrays.
2383 (gimple_fold_builtin_strlen): Determine and set length range for
2384 non-constant character arrays.
2386 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2389 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2392 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2394 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2396 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2399 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2400 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2401 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2402 indexed_or_indirect_operand predicate.
2403 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2404 (*vsx_le_perm_load_v8hi): Likewise.
2405 (*vsx_le_perm_load_v16qi): Likewise.
2406 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2407 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2408 (*vsx_le_perm_store_v8hi): Likewise.
2409 (*vsx_le_perm_store_v16qi): Likewise.
2410 (eight unnamed splitters): Likewise.
2412 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2414 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2415 * config/rs6000/emmintrin.h: Likewise.
2416 * config/rs6000/mmintrin.h: Likewise.
2417 * config/rs6000/xmmintrin.h: Likewise.
2419 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2422 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2424 * tree.c (tree_nop_conversion): Return true for location wrapper
2426 (maybe_wrap_with_location): New function.
2427 (selftest::check_strip_nops): New function.
2428 (selftest::test_location_wrappers): New function.
2429 (selftest::tree_c_tests): Call it.
2430 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2431 (maybe_wrap_with_location): New decl.
2432 (EXPR_LOCATION_WRAPPER_P): New macro.
2433 (location_wrapper_p): New inline function.
2434 (tree_strip_any_location_wrapper): New inline function.
2436 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2439 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2440 stack_realign_offset for the largest alignment of stack slot
2442 (ix86_find_max_used_stack_alignment): New function.
2443 (ix86_finalize_stack_frame_flags): Use it. Set
2444 max_used_stack_alignment if we don't realign stack.
2445 * config/i386/i386.h (machine_function): Add
2446 max_used_stack_alignment.
2448 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2450 * config/arm/arm.opt (-mbranch-cost): New option.
2451 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2454 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2457 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2458 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2460 2018-01-10 Richard Biener <rguenther@suse.de>
2463 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2464 early out so it also covers the case where we have a non-NULL
2467 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2469 PR tree-optimization/83753
2470 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2471 for non-strided grouped accesses if the number of elements is 1.
2473 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2476 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2477 * i386.h (TARGET_USE_GATHER): Define.
2478 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2480 2018-01-10 Martin Liska <mliska@suse.cz>
2483 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2484 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2486 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2487 CLEANUP_NO_PARTITIONING is not set.
2489 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2491 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2492 for vectors, as a partial revert of r254296.
2493 * rtl.h (const_vec_p): Delete.
2494 (const_vec_duplicate_p): Don't test for vector CONSTs.
2495 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2496 * expmed.c (make_tree): Likewise.
2499 * common.md (E, F): Use CONSTANT_P instead of checking for
2501 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2502 checking for CONST_VECTOR.
2504 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2507 * predict.c (force_edge_cold): Handle in more sane way edges
2510 2018-01-09 Carl Love <cel@us.ibm.com>
2512 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2514 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2515 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2516 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2517 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2518 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2519 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2520 * config/rs6000/rs6000-protos.h: Add extern defition for
2521 rs6000_generate_float2_double_code.
2522 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2524 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2525 (float2_v2df): Add define_expand.
2527 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2530 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2531 op_mode in the force_to_mode call.
2533 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2535 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2536 instead of checking each element individually.
2537 (aarch64_evpc_uzp): Likewise.
2538 (aarch64_evpc_zip): Likewise.
2539 (aarch64_evpc_ext): Likewise.
2540 (aarch64_evpc_rev): Likewise.
2541 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2542 instead of checking each element individually. Return true without
2544 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2545 whether all selected elements come from the same input, instead of
2546 checking each element individually. Remove calls to gen_rtx_REG,
2547 start_sequence and end_sequence and instead assert that no rtl is
2550 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2552 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2553 order of HIGH and CONST checks.
2555 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2557 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2558 if the destination isn't an SSA_NAME.
2560 2018-01-09 Richard Biener <rguenther@suse.de>
2562 PR tree-optimization/83668
2563 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2565 (canonicalize_loop_form): ... here, renamed from ...
2566 (canonicalize_loop_closed_ssa_form): ... this and amended to
2567 swap successor edges for loop exit blocks to make us use
2568 the RPO order we need for initial schedule generation.
2570 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2572 PR tree-optimization/64811
2573 * match.pd: When optimizing comparisons with Inf, avoid
2574 introducing or losing exceptions from comparisons with NaN.
2576 2018-01-09 Martin Liska <mliska@suse.cz>
2579 * asan.c (shadow_mem_size): Add gcc_assert.
2581 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2583 Don't save registers in main().
2586 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2587 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2588 * config/avr/avr.c (avr_set_current_function): Don't error if
2589 naked, OS_task or OS_main are specified at the same time.
2590 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2592 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2594 * common/config/avr/avr-common.c (avr_option_optimization_table):
2595 Switch on -mmain-is-OS_task for optimizing compilations.
2597 2018-01-09 Richard Biener <rguenther@suse.de>
2599 PR tree-optimization/83572
2600 * graphite.c: Include cfganal.h.
2601 (graphite_transform_loops): Connect infinite loops to exit
2602 and remove fake edges at the end.
2604 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2606 * ipa-inline.c (edge_badness): Revert accidental checkin.
2608 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2611 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2612 symbols; not inline clones.
2614 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2617 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2618 hard registers. Formatting fixes.
2620 PR preprocessor/83722
2621 * gcc.c (try_generate_repro): Pass
2622 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2623 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2626 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2627 Kito Cheng <kito.cheng@gmail.com>
2629 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2630 (riscv_leaf_function_p): Delete.
2631 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2633 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2635 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2637 (do_ifelse): New function.
2638 (do_isel): New function.
2639 (do_sub3): New function.
2640 (do_add3): New function.
2641 (do_load_mask_compare): New function.
2642 (do_overlap_load_compare): New function.
2643 (expand_compare_loop): New function.
2644 (expand_block_compare): Call expand_compare_loop() when appropriate.
2645 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2647 (-mblock-compare-inline-loop-limit): New option.
2649 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2652 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2653 Reverse order of second and third operands in first alternative.
2654 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2655 of first and second elements in UNSPEC_VPERMR vector.
2656 (altivec_expand_vec_perm_le): Likewise.
2658 2017-01-08 Jeff Law <law@redhat.com>
2660 PR rtl-optimizatin/81308
2661 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2662 (process_switch): If group_case_labels makes a change, then set
2664 (pass_convert_switch::execute): If a switch is converted, then
2665 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2667 PR rtl-optimization/81308
2668 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2671 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2673 PR target/83663 - Revert r255946
2674 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2675 generation for cases where splatting a value is not useful.
2676 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2677 across a vec_duplicate and a paradoxical subreg forming a vector
2678 mode to a vec_concat.
2680 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2682 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2683 -march=armv8.3-a variants.
2684 * config/arm/t-multilib: Likewise.
2685 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2687 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2689 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2691 (cceq_ior_compare_complement): Give it a name so I can use it, and
2692 change boolean_or_operator predicate to boolean_operator so it can
2693 be used to generate a crand.
2694 (eqne): New code iterator.
2695 (bd/bd_neg): New code_attrs.
2696 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2697 a single define_insn.
2698 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2699 decrement (bdnzt/bdnzf/bdzt/bdzf).
2700 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2701 with the new names of the branch decrement patterns, and added the
2702 names of the branch decrement conditional patterns.
2704 2018-01-08 Richard Biener <rguenther@suse.de>
2706 PR tree-optimization/83563
2707 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2710 2018-01-08 Richard Biener <rguenther@suse.de>
2713 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2715 2018-01-08 Richard Biener <rguenther@suse.de>
2717 PR tree-optimization/83685
2718 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2719 references to abnormals.
2721 2018-01-08 Richard Biener <rguenther@suse.de>
2724 * dwarf2out.c (output_indirect_strings): Handle empty
2725 skeleton_debug_str_hash.
2726 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2728 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2730 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2731 (emit_store_direct): Likewise.
2732 (arc_trampoline_adjust_address): Likewise.
2733 (arc_asm_trampoline_template): New function.
2734 (arc_initialize_trampoline): Use asm_trampoline_template.
2735 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2736 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2737 * config/arc/arc.md (flush_icache): Delete pattern.
2739 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2741 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2742 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2745 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2748 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2749 by not USED_FOR_TARGET.
2750 (make_pass_resolve_sw_modes): Likewise.
2752 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2754 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2757 2018-01-08 Richard Biener <rguenther@suse.de>
2760 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2762 2018-01-08 Richard Biener <rguenther@suse.de>
2765 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2767 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2770 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2771 basic blocks with a small number of successors.
2772 (convert_control_dep_chain_into_preds): Improve handling of
2774 (dump_predicates): Split apart into...
2775 (dump_pred_chain): ...here...
2776 (dump_pred_info): ...and here.
2777 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2778 (can_chain_union_be_invalidated_p): Improve check for invalidation
2780 (uninit_uses_cannot_happen): Avoid unnecessary if
2781 convert_control_dep_chain_into_preds yielded nothing.
2783 2018-01-06 Martin Sebor <msebor@redhat.com>
2785 PR tree-optimization/83640
2786 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2787 subtracting negative offset from size.
2788 (builtin_access::overlap): Adjust offset bounds of the access to fall
2789 within the size of the object if possible.
2791 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2793 PR rtl-optimization/83699
2794 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2795 extract_bit_field_as_subreg to cases in which the extracted
2796 value is also a vector.
2798 * lra-constraints.c (process_alt_operands): Test for the equivalence
2799 substitutions when detecting a possible reload cycle.
2801 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2804 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2805 by default if flag_selective_schedling{,2}. Formatting fixes.
2807 PR rtl-optimization/83682
2808 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2809 if it has non-VECTOR_MODE element mode.
2810 (vec_duplicate_p): Likewise.
2813 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2814 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2816 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2819 * config/i386/i386-builtin.def
2820 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2821 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2822 Require also OPTION_MASK_ISA_AVX512F in addition to
2823 OPTION_MASK_ISA_GFNI.
2824 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2825 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2826 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2827 to OPTION_MASK_ISA_GFNI.
2828 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2829 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2830 OPTION_MASK_ISA_AVX512BW.
2831 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2832 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2833 addition to OPTION_MASK_ISA_GFNI.
2834 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2835 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2836 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2837 to OPTION_MASK_ISA_GFNI.
2838 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2839 a requirement for all ISAs rather than any of them with a few
2841 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2843 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2844 bitmasks to be enabled with 3 exceptions, instead of requiring any
2845 enabled ISA with lots of exceptions.
2846 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2847 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2848 Change avx512bw in isa attribute to avx512f.
2849 * config/i386/sgxintrin.h: Add license boilerplate.
2850 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2851 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2852 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2853 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2855 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2856 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2857 temporarily sse2 rather than sse if not enabled already.
2860 * config/i386/sse.md (VI248_VLBW): Rename to ...
2861 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2862 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2863 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2864 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2865 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2866 mode iterator instead of VI248_VLBW.
2868 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2870 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2871 (record_modified): Skip clobbers; add debug output.
2872 (param_change_prob): Use sreal frequencies.
2874 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2876 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2877 punt for user-aligned variables.
2879 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2881 * tree-chrec.c (chrec_contains_symbols): Return true for
2884 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2887 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2888 of (x|y) == x for BICS pattern.
2890 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2892 PR tree-optimization/83605
2893 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
2894 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
2897 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
2899 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
2900 * config/epiphany/rtems.h: New file.
2902 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2903 Uros Bizjak <ubizjak@gmail.com>
2906 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
2907 QIreg_operand instead of register_operand predicate.
2908 * config/i386/i386.c (ix86_rop_should_change_byte_p,
2909 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
2910 comments instead of -fmitigate[-_]rop.
2912 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
2915 * cgraphunit.c (symbol_table::compile): Switch to text_section
2916 before calling assembly_start debug hook.
2917 * run-rtl-passes.c (run_rtl_passes): Likewise.
2920 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2922 * tree-vrp.c (extract_range_from_binary_expr_1): Check
2923 range_int_cst_p rather than !symbolic_range_p before calling
2924 extract_range_from_multiplicative_op_1.
2926 2017-01-04 Jeff Law <law@redhat.com>
2928 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
2929 redundant test in assertion.
2931 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2933 * doc/rtl.texi: Document machine_mode wrapper classes.
2935 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2937 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
2940 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2942 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
2943 the VEC_PERM_EXPR fold to fail.
2945 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2948 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
2949 to switched_sections.
2951 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2954 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
2957 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
2960 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
2961 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
2963 2018-01-04 Jakub Jelinek <jakub@redhat.com>
2966 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
2967 is BLKmode and bitpos not zero or mode change is needed.
2969 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
2972 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
2975 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
2978 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
2979 instead of MULT rtx. Update all corresponding splitters.
2981 (*ssub<modesuffix>): Ditto.
2983 (*cmp_sadd_di): Update split patterns.
2984 (*cmp_sadd_si): Ditto.
2985 (*cmp_sadd_sidi): Ditto.
2986 (*cmp_ssub_di): Ditto.
2987 (*cmp_ssub_si): Ditto.
2988 (*cmp_ssub_sidi): Ditto.
2989 * config/alpha/predicates.md (const23_operand): New predicate.
2990 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
2991 Look for ASHIFT, not MULT inner operand.
2992 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
2994 2018-01-04 Martin Liska <mliska@suse.cz>
2996 PR gcov-profile/83669
2997 * gcov.c (output_intermediate_file): Add version to intermediate
2999 * doc/gcov.texi: Document new field 'version' in intermediate
3000 file format. Fix location of '-k' option of gcov command.
3002 2018-01-04 Martin Liska <mliska@suse.cz>
3005 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3007 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3009 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3011 2018-01-03 Martin Sebor <msebor@redhat.com>
3013 PR tree-optimization/83655
3014 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3015 checking calls with invalid arguments.
3017 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3019 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3020 (vectorizable_mask_load_store): Delete.
3021 (vectorizable_call): Return false for masked loads and stores.
3022 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3023 instead of gimple_assign_rhs1.
3024 (vectorizable_load): Handle IFN_MASK_LOAD.
3025 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3027 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3029 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3031 (vectorizable_mask_load_store): ...here.
3032 (vectorizable_load): ...and here.
3034 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3036 * tree-vect-stmts.c (vect_build_all_ones_mask)
3037 (vect_build_zero_merge_argument): New functions, split out from...
3038 (vectorizable_load): ...here.
3040 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3042 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3044 (vectorizable_mask_load_store): ...here.
3045 (vectorizable_store): ...and here.
3047 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3049 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3051 (vectorizable_mask_load_store): ...here.
3053 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3055 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3056 (vect_model_store_cost): Take a vec_load_store_type instead of a
3058 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3059 (vect_model_store_cost): Take a vec_load_store_type instead of a
3061 (vectorizable_mask_load_store): Update accordingly.
3062 (vectorizable_store): Likewise.
3063 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3065 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3067 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3068 IFN_MASK_LOAD calls here rather than...
3069 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3071 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3072 Alan Hayward <alan.hayward@arm.com>
3073 David Sherwood <david.sherwood@arm.com>
3075 * expmed.c (extract_bit_field_1): For vector extracts,
3076 fall back to extract_bit_field_as_subreg if vec_extract
3079 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3080 Alan Hayward <alan.hayward@arm.com>
3081 David Sherwood <david.sherwood@arm.com>
3083 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3084 they are variable or constant sized.
3085 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3086 slots for constant-sized data.
3088 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3089 Alan Hayward <alan.hayward@arm.com>
3090 David Sherwood <david.sherwood@arm.com>
3092 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3093 handling COND_EXPRs with boolean comparisons, try to find a better
3094 basis for the mask type than the boolean itself.
3096 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3098 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3099 is calculated and how it can be overridden.
3100 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3101 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3103 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3106 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3107 Alan Hayward <alan.hayward@arm.com>
3108 David Sherwood <david.sherwood@arm.com>
3110 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3111 Remove the mode argument.
3112 (aarch64_simd_valid_immediate): Remove the mode and inverse
3114 * config/aarch64/iterators.md (bitsize): New iterator.
3115 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3116 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3117 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3118 aarch64_simd_valid_immediate.
3119 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3120 (aarch64_reg_or_bic_imm): Likewise.
3121 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3122 with an insn_type enum and msl with a modifier_type enum.
3123 Replace element_width with a scalar_mode. Change the shift
3124 to unsigned int. Add constructors for scalar_float_mode and
3125 scalar_int_mode elements.
3126 (aarch64_vect_float_const_representable_p): Delete.
3127 (aarch64_can_const_movi_rtx_p)
3128 (aarch64_simd_scalar_immediate_valid_for_move)
3129 (aarch64_simd_make_constant): Update call to
3130 aarch64_simd_valid_immediate.
3131 (aarch64_advsimd_valid_immediate_hs): New function.
3132 (aarch64_advsimd_valid_immediate): Likewise.
3133 (aarch64_simd_valid_immediate): Remove mode and inverse
3134 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3135 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3136 and aarch64_float_const_representable_p on the result.
3137 (aarch64_output_simd_mov_immediate): Remove mode argument.
3138 Update call to aarch64_simd_valid_immediate and use of
3139 simd_immediate_info.
3140 (aarch64_output_scalar_simd_mov_immediate): Update call
3143 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3144 Alan Hayward <alan.hayward@arm.com>
3145 David Sherwood <david.sherwood@arm.com>
3147 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3148 (mode_nunits): Likewise CONST_MODE_NUNITS.
3149 * machmode.def (ADJUST_NUNITS): Document.
3150 * genmodes.c (mode_data::need_nunits_adj): New field.
3151 (blank_mode): Update accordingly.
3152 (adj_nunits): New variable.
3153 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3155 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3156 listed in adj_nunits.
3157 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3158 listed in adj_nunits. Don't emit case statements for such modes.
3159 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3160 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3161 nothing if adj_nunits is nonnull.
3162 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3163 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3164 (emit_mode_fbit): Update use of print_maybe_const_decl.
3165 (emit_move_size): Likewise. Treat the array as non-const
3167 (emit_mode_adjustments): Handle adj_nunits.
3169 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3171 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3172 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3173 (VECTOR_MODES): Use it.
3174 (make_vector_modes): Take the prefix as an argument.
3176 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3177 Alan Hayward <alan.hayward@arm.com>
3178 David Sherwood <david.sherwood@arm.com>
3180 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3181 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3182 for MODE_VECTOR_BOOL.
3183 * machmode.def (VECTOR_BOOL_MODE): Document.
3184 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3185 (make_vector_bool_mode): New function.
3186 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3188 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3189 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3191 * stor-layout.c (int_mode_for_mode): Likewise.
3192 * tree.c (build_vector_type_for_mode): Likewise.
3193 * varasm.c (output_constant_pool_2): Likewise.
3194 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3195 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3196 for MODE_VECTOR_BOOL.
3197 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3198 of mode class checks.
3199 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3200 instead of a list of mode class checks.
3201 (expand_vector_scalar_condition): Likewise.
3202 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3204 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3205 Alan Hayward <alan.hayward@arm.com>
3206 David Sherwood <david.sherwood@arm.com>
3208 * machmode.h (mode_size): Change from unsigned short to
3210 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3211 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3212 or if measurement_type is not polynomial.
3213 (fixed_size_mode::includes_p): Check for constant-sized modes.
3214 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3215 return a poly_uint16 rather than an unsigned short.
3216 (emit_mode_size): Change the type of mode_size from unsigned short
3217 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3218 (emit_mode_adjustments): Cope with polynomial vector sizes.
3219 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3221 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3223 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3224 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3225 * caller-save.c (setup_save_areas): Likewise.
3226 (replace_reg_with_saved_mem): Likewise.
3227 * calls.c (emit_library_call_value_1): Likewise.
3228 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3229 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3230 (gen_lowpart_for_combine): Likewise.
3231 * convert.c (convert_to_integer_1): Likewise.
3232 * cse.c (equiv_constant, cse_insn): Likewise.
3233 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3234 (cselib_subst_to_values): Likewise.
3235 * dce.c (word_dce_process_block): Likewise.
3236 * df-problems.c (df_word_lr_mark_ref): Likewise.
3237 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3238 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3239 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3240 (rtl_for_decl_location): Likewise.
3241 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3242 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3243 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3244 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3245 (expand_expr_real_1): Likewise.
3246 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3247 (pad_below): Likewise.
3248 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3249 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3250 * ira.c (get_subreg_tracking_sizes): Likewise.
3251 * ira-build.c (ira_create_allocno_objects): Likewise.
3252 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3253 (ira_sort_regnos_for_alter_reg): Likewise.
3254 * ira-costs.c (record_operand_costs): Likewise.
3255 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3256 (resolve_simple_move): Likewise.
3257 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3258 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3259 (lra_constraints): Likewise.
3260 (CONST_POOL_OK_P): Reject variable-sized modes.
3261 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3262 (add_pseudo_to_slot, lra_spill): Likewise.
3263 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3264 * optabs-query.c (get_best_extraction_insn): Likewise.
3265 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3266 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3267 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3268 * recog.c (offsettable_address_addr_space_p): Likewise.
3269 * regcprop.c (maybe_mode_change): Likewise.
3270 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3271 * regrename.c (build_def_use): Likewise.
3272 * regstat.c (dump_reg_info): Likewise.
3273 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3274 (find_reloads, find_reloads_subreg_address): Likewise.
3275 * reload1.c (eliminate_regs_1): Likewise.
3276 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3277 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3278 (simplify_binary_operation_1, simplify_subreg): Likewise.
3279 * targhooks.c (default_function_arg_padding): Likewise.
3280 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3281 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3282 (verify_gimple_assign_ternary): Likewise.
3283 * tree-inline.c (estimate_move_cost): Likewise.
3284 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3285 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3286 (get_address_cost_ainc): Likewise.
3287 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3288 (vect_supportable_dr_alignment): Likewise.
3289 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3290 (vectorizable_reduction): Likewise.
3291 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3292 (vectorizable_operation, vectorizable_load): Likewise.
3293 * tree.c (build_same_sized_truth_vector_type): Likewise.
3294 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3295 * var-tracking.c (emit_note_insn_var_location): Likewise.
3296 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3297 (ADDR_VEC_ALIGN): Likewise.
3299 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3300 Alan Hayward <alan.hayward@arm.com>
3301 David Sherwood <david.sherwood@arm.com>
3303 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3305 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3306 or if measurement_type is polynomial.
3307 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3308 * combine.c (make_extraction): Likewise.
3309 * dse.c (find_shift_sequence): Likewise.
3310 * dwarf2out.c (mem_loc_descriptor): Likewise.
3311 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3312 (extract_bit_field, extract_low_bits): Likewise.
3313 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3314 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3315 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3316 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3317 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3318 * reload.c (find_reloads): Likewise.
3319 * reload1.c (alter_reg): Likewise.
3320 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3321 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3322 * tree-if-conv.c (predicate_mem_writes): Likewise.
3323 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3324 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3325 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3326 * valtrack.c (dead_debug_insert_temp): Likewise.
3327 * varasm.c (mergeable_constant_section): Likewise.
3328 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3330 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3331 Alan Hayward <alan.hayward@arm.com>
3332 David Sherwood <david.sherwood@arm.com>
3334 * expr.c (expand_assignment): Cope with polynomial mode sizes
3335 when assigning to a CONCAT.
3337 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3338 Alan Hayward <alan.hayward@arm.com>
3339 David Sherwood <david.sherwood@arm.com>
3341 * machmode.h (mode_precision): Change from unsigned short to
3343 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3345 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3346 or if measurement_type is not polynomial.
3347 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3348 in which the mode is already known to be a scalar_int_mode.
3349 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3350 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3352 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3353 for GET_MODE_PRECISION.
3354 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3355 for GET_MODE_PRECISION.
3356 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3358 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3359 (expand_field_assignment, make_extraction): Likewise.
3360 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3361 (get_last_value): Likewise.
3362 * convert.c (convert_to_integer_1): Likewise.
3363 * cse.c (cse_insn): Likewise.
3364 * expr.c (expand_expr_real_1): Likewise.
3365 * lra-constraints.c (simplify_operand_subreg): Likewise.
3366 * optabs-query.c (can_atomic_load_p): Likewise.
3367 * optabs.c (expand_atomic_load): Likewise.
3368 (expand_atomic_store): Likewise.
3369 * ree.c (combine_reaching_defs): Likewise.
3370 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3371 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3372 * tree.h (type_has_mode_precision_p): Likewise.
3373 * ubsan.c (instrument_si_overflow): Likewise.
3375 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3376 Alan Hayward <alan.hayward@arm.com>
3377 David Sherwood <david.sherwood@arm.com>
3379 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3380 polynomial numbers of units.
3381 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3382 (valid_vector_subparts_p): New function.
3383 (build_vector_type): Remove temporary shim and take the number
3384 of units as a poly_uint64 rather than an int.
3385 (build_opaque_vector_type): Take the number of units as a
3386 poly_uint64 rather than an int.
3387 * tree.c (build_vector_from_ctor): Handle polynomial
3388 TYPE_VECTOR_SUBPARTS.
3389 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3390 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3391 (build_vector_from_val): If the number of units is variable,
3392 use build_vec_duplicate_cst for constant operands and
3393 VEC_DUPLICATE_EXPR otherwise.
3394 (make_vector_type): Remove temporary is_constant ().
3395 (build_vector_type, build_opaque_vector_type): Take the number of
3396 units as a poly_uint64 rather than an int.
3397 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3399 * cfgexpand.c (expand_debug_expr): Likewise.
3400 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3401 (store_constructor, expand_expr_real_1): Likewise.
3402 (const_scalar_mask_from_tree): Likewise.
3403 * fold-const-call.c (fold_const_reduction): Likewise.
3404 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3405 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3406 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3407 (fold_relational_const): Likewise.
3408 (native_interpret_vector): Likewise. Change the size from an
3409 int to an unsigned int.
3410 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3411 TYPE_VECTOR_SUBPARTS.
3412 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3413 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3414 duplicating a non-constant operand into a variable-length vector.
3415 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3416 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3417 * ipa-icf.c (sem_variable::equals): Likewise.
3418 * match.pd: Likewise.
3419 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3420 * print-tree.c (print_node): Likewise.
3421 * stor-layout.c (layout_type): Likewise.
3422 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3423 * tree-cfg.c (verify_gimple_comparison): Likewise.
3424 (verify_gimple_assign_binary): Likewise.
3425 (verify_gimple_assign_ternary): Likewise.
3426 (verify_gimple_assign_single): Likewise.
3427 * tree-pretty-print.c (dump_generic_node): Likewise.
3428 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3429 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3430 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3431 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3432 (vect_shift_permute_load_chain): Likewise.
3433 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3434 (expand_vector_condition, optimize_vector_constructor): Likewise.
3435 (lower_vec_perm, get_compute_type): Likewise.
3436 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3437 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3438 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3439 (vect_recog_mask_conversion_pattern): Likewise.
3440 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3441 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3442 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3443 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3444 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3445 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3446 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3447 (supportable_widening_operation): Likewise.
3448 (supportable_narrowing_operation): Likewise.
3449 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3451 * varasm.c (output_constant): Likewise.
3453 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3454 Alan Hayward <alan.hayward@arm.com>
3455 David Sherwood <david.sherwood@arm.com>
3457 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3458 so that both the length == 3 and length != 3 cases set up their
3459 own permute vectors. Add comments explaining why we know the
3460 number of elements is constant.
3461 (vect_permute_load_chain): Likewise.
3463 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3464 Alan Hayward <alan.hayward@arm.com>
3465 David Sherwood <david.sherwood@arm.com>
3467 * machmode.h (mode_nunits): Change from unsigned char to
3469 (ONLY_FIXED_SIZE_MODES): New macro.
3470 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3471 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3472 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3474 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3475 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3476 or if measurement_type is not polynomial.
3477 * genmodes.c (ZERO_COEFFS): New macro.
3478 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3480 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3481 Use ZERO_COEFFS when emitting initializers.
3482 * data-streamer.h (bp_pack_poly_value): New function.
3483 (bp_unpack_poly_value): Likewise.
3484 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3485 for GET_MODE_NUNITS.
3486 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3487 for GET_MODE_NUNITS.
3488 * tree.c (make_vector_type): Remove temporary shim and make
3489 the real function take the number of units as a poly_uint64
3491 (build_vector_type_for_mode): Handle polynomial nunits.
3492 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3493 * emit-rtl.c (const_vec_series_p_1): Likewise.
3494 (gen_rtx_CONST_VECTOR): Likewise.
3495 * fold-const.c (test_vec_duplicate_folding): Likewise.
3496 * genrecog.c (validate_pattern): Likewise.
3497 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3498 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3499 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3500 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3501 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3502 * rtlanal.c (subreg_get_info): Likewise.
3503 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3504 (vect_grouped_load_supported): Likewise.
3505 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3506 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3507 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3508 (simplify_const_unary_operation, simplify_binary_operation_1)
3509 (simplify_const_binary_operation, simplify_ternary_operation)
3510 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3511 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3512 instead of CONST_VECTOR_NUNITS.
3513 * varasm.c (output_constant_pool_2): Likewise.
3514 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3515 explicit-encoded elements in the XVEC for variable-length vectors.
3517 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3519 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3521 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3522 Alan Hayward <alan.hayward@arm.com>
3523 David Sherwood <david.sherwood@arm.com>
3525 * coretypes.h (fixed_size_mode): Declare.
3526 (fixed_size_mode_pod): New typedef.
3527 * builtins.h (target_builtins::x_apply_args_mode)
3528 (target_builtins::x_apply_result_mode): Change type to
3529 fixed_size_mode_pod.
3530 * builtins.c (apply_args_size, apply_result_size, result_vector)
3531 (expand_builtin_apply_args_1, expand_builtin_apply)
3532 (expand_builtin_return): Update accordingly.
3534 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3536 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3537 * cselib.c (cselib_hash_rtx): Likewise.
3538 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3539 CONST_VECTOR encoding.
3541 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3542 Jeff Law <law@redhat.com>
3545 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3546 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3547 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3548 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3551 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3552 explicitly probe *sp in a noreturn function if there were any callee
3553 register saves or frame pointer is needed.
3555 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3558 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3559 BLKmode for ternary, binary or unary expressions.
3562 * var-tracking.c (delete_vta_debug_insn): New inline function.
3563 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3564 insns from get_insns () to NULL instead of each bb separately.
3565 Use delete_vta_debug_insn. No longer static.
3566 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3567 delete_vta_debug_insns callers.
3568 * rtl.h (delete_vta_debug_insns): Declare.
3569 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3570 instead of variable_tracking_main.
3572 2018-01-03 Martin Sebor <msebor@redhat.com>
3574 PR tree-optimization/83603
3575 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3576 arguments past the endof the argument list in functions declared
3577 without a prototype.
3578 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3579 Avoid checking when arguments are null.
3581 2018-01-03 Martin Sebor <msebor@redhat.com>
3584 * doc/extend.texi (attribute const): Fix a typo.
3585 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3586 issuing -Wsuggest-attribute for void functions.
3588 2018-01-03 Martin Sebor <msebor@redhat.com>
3590 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3591 offset_int::from instead of wide_int::to_shwi.
3592 (maybe_diag_overlap): Remove assertion.
3593 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3594 * gimple-ssa-sprintf.c (format_directive): Same.
3595 (parse_directive): Same.
3596 (sprintf_dom_walker::compute_format_length): Same.
3597 (try_substitute_return_value): Same.
3599 2017-01-03 Jeff Law <law@redhat.com>
3602 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3603 non-constant residual for zero at runtime and avoid probing in
3604 that case. Reorganize code for trailing problem to mirror handling
3607 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3609 PR tree-optimization/83501
3610 * tree-ssa-strlen.c (get_string_cst): New.
3611 (handle_char_store): Call get_string_cst.
3613 2018-01-03 Martin Liska <mliska@suse.cz>
3615 PR tree-optimization/83593
3616 * tree-ssa-strlen.c: Include tree-cfg.h.
3617 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3618 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3619 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3621 (strlen_dom_walker::before_dom_children): Call
3622 gimple_purge_dead_eh_edges. Dump tranformation with details
3624 (strlen_dom_walker::before_dom_children): Update call by adding
3625 new argument cleanup_eh.
3626 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3628 2018-01-03 Martin Liska <mliska@suse.cz>
3631 * cif-code.def (VARIADIC_THUNK): New enum value.
3632 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3635 2018-01-03 Jan Beulich <jbeulich@suse.com>
3637 * sse.md (mov<mode>_internal): Tighten condition for when to use
3638 vmovdqu<ssescalarsize> for TI and OI modes.
3640 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3642 Update copyright years.
3644 2018-01-03 Martin Liska <mliska@suse.cz>
3647 * ipa-visibility.c (function_and_variable_visibility): Skip
3648 functions with noipa attribure.
3650 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3652 * gcc.c (process_command): Update copyright notice dates.
3653 * gcov-dump.c (print_version): Ditto.
3654 * gcov.c (print_version): Ditto.
3655 * gcov-tool.c (print_version): Ditto.
3656 * gengtype.c (create_file): Ditto.
3657 * doc/cpp.texi: Bump @copying's copyright year.
3658 * doc/cppinternals.texi: Ditto.
3659 * doc/gcc.texi: Ditto.
3660 * doc/gccint.texi: Ditto.
3661 * doc/gcov.texi: Ditto.
3662 * doc/install.texi: Ditto.
3663 * doc/invoke.texi: Ditto.
3665 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3667 * vector-builder.h (vector_builder::m_full_nelts): Change from
3668 unsigned int to poly_uint64.
3669 (vector_builder::full_nelts): Update prototype accordingly.
3670 (vector_builder::new_vector): Likewise.
3671 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3672 (vector_builder::operator ==): Likewise.
3673 (vector_builder::finalize): Likewise.
3674 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3675 Take the number of elements as a poly_uint64 rather than an
3677 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3678 from unsigned int to poly_uint64.
3679 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3680 (vec_perm_indices::new_vector): Likewise.
3681 (vec_perm_indices::length): Likewise.
3682 (vec_perm_indices::nelts_per_input): Likewise.
3683 (vec_perm_indices::input_nelts): Likewise.
3684 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3685 number of elements per input as a poly_uint64 rather than an
3686 unsigned int. Use the original encoding for variable-length
3687 vectors, rather than clamping each individual element.
3688 For the second and subsequent elements in each pattern,
3689 clamp the step and base before clamping their sum.
3690 (vec_perm_indices::series_p): Handle polynomial element counts.
3691 (vec_perm_indices::all_in_range_p): Likewise.
3692 (vec_perm_indices_to_tree): Likewise.
3693 (vec_perm_indices_to_rtx): Likewise.
3694 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3695 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3696 (tree_vector_builder::new_binary_operation): Handle polynomial
3697 element counts. Return false if we need to know the number
3698 of elements at compile time.
3699 * fold-const.c (fold_vec_perm): Punt if the number of elements
3700 isn't known at compile time.
3702 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3704 * vec-perm-indices.h (vec_perm_builder): Change element type
3705 from HOST_WIDE_INT to poly_int64.
3706 (vec_perm_indices::element_type): Update accordingly.
3707 (vec_perm_indices::clamp): Handle polynomial element_types.
3708 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3709 (vec_perm_indices::all_in_range_p): Likewise.
3710 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3712 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3713 polynomial vec_perm_indices element types.
3714 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3715 * fold-const.c (fold_vec_perm): Likewise.
3716 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3717 * tree-vect-generic.c (lower_vec_perm): Likewise.
3718 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3719 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3720 element type to HOST_WIDE_INT.
3722 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3723 Alan Hayward <alan.hayward@arm.com>
3724 David Sherwood <david.sherwood@arm.com>
3726 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3727 rather than an int. Use plus_constant.
3728 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3729 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3731 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3732 Alan Hayward <alan.hayward@arm.com>
3733 David Sherwood <david.sherwood@arm.com>
3735 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3736 a HOST_WIDE_INT to a poly_int64.
3738 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3739 Alan Hayward <alan.hayward@arm.com>
3740 David Sherwood <david.sherwood@arm.com>
3742 * calls.c (load_register_parameters): Cope with polynomial
3743 mode sizes. Require a constant size for BLKmode parameters
3744 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3745 forces a parameter to be padded at the lsb end in order to
3746 fill a complete number of words, require the parameter size
3747 to be ordered wrt UNITS_PER_WORD.
3749 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3750 Alan Hayward <alan.hayward@arm.com>
3751 David Sherwood <david.sherwood@arm.com>
3753 * reload1.c (spill_stack_slot_width): Change element type
3754 from unsigned int to poly_uint64_pod.
3755 (alter_reg): Treat mode sizes as polynomial.
3757 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3758 Alan Hayward <alan.hayward@arm.com>
3759 David Sherwood <david.sherwood@arm.com>
3761 * reload.c (complex_word_subreg_p): New function.
3762 (reload_inner_reg_of_subreg, push_reload): Use it.
3764 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3765 Alan Hayward <alan.hayward@arm.com>
3766 David Sherwood <david.sherwood@arm.com>
3768 * lra-constraints.c (process_alt_operands): Reject matched
3769 operands whose sizes aren't ordered.
3770 (match_reload): Refer to this check here.
3772 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3773 Alan Hayward <alan.hayward@arm.com>
3774 David Sherwood <david.sherwood@arm.com>
3776 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3777 that the mode size is in the set {1, 2, 4, 8, 16}.
3779 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3780 Alan Hayward <alan.hayward@arm.com>
3781 David Sherwood <david.sherwood@arm.com>
3783 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3784 Use plus_constant instead of gen_rtx_PLUS.
3786 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3787 Alan Hayward <alan.hayward@arm.com>
3788 David Sherwood <david.sherwood@arm.com>
3790 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3791 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3792 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3793 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3794 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3795 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3796 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3797 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3798 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3799 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3801 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3802 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3803 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3804 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3805 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3806 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3807 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3808 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3809 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3810 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3812 * expr.c (emit_move_resolve_push): Treat the input and result
3813 of PUSH_ROUNDING as a poly_int64.
3814 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3815 (emit_push_insn): Likewise.
3816 * lra-eliminations.c (mark_not_eliminable): Likewise.
3817 * recog.c (push_operand): Likewise.
3818 * reload1.c (elimination_effects): Likewise.
3819 * rtlanal.c (nonzero_bits1): Likewise.
3820 * calls.c (store_one_arg): Likewise. Require the padding to be
3821 known at compile time.
3823 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3824 Alan Hayward <alan.hayward@arm.com>
3825 David Sherwood <david.sherwood@arm.com>
3827 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3828 Use plus_constant instead of gen_rtx_PLUS.
3830 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3831 Alan Hayward <alan.hayward@arm.com>
3832 David Sherwood <david.sherwood@arm.com>
3834 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3837 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3838 Alan Hayward <alan.hayward@arm.com>
3839 David Sherwood <david.sherwood@arm.com>
3841 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3842 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3843 via stack temporaries. Treat the mode size as polynomial too.
3845 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3846 Alan Hayward <alan.hayward@arm.com>
3847 David Sherwood <david.sherwood@arm.com>
3849 * expr.c (expand_expr_real_2): When handling conversions involving
3850 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3851 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3852 as a poly_uint64 too.
3854 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3855 Alan Hayward <alan.hayward@arm.com>
3856 David Sherwood <david.sherwood@arm.com>
3858 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3860 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3861 Alan Hayward <alan.hayward@arm.com>
3862 David Sherwood <david.sherwood@arm.com>
3864 * combine.c (can_change_dest_mode): Handle polynomial
3865 REGMODE_NATURAL_SIZE.
3866 * expmed.c (store_bit_field_1): Likewise.
3867 * expr.c (store_constructor): Likewise.
3868 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3869 and polynomial REGMODE_NATURAL_SIZE.
3870 (gen_lowpart_common): Likewise.
3871 * reginfo.c (record_subregs_of_mode): Likewise.
3872 * rtlanal.c (read_modify_subreg_p): Likewise.
3874 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3875 Alan Hayward <alan.hayward@arm.com>
3876 David Sherwood <david.sherwood@arm.com>
3878 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3879 numbers of elements.
3881 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3882 Alan Hayward <alan.hayward@arm.com>
3883 David Sherwood <david.sherwood@arm.com>
3885 * match.pd: Cope with polynomial numbers of vector elements.
3887 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3888 Alan Hayward <alan.hayward@arm.com>
3889 David Sherwood <david.sherwood@arm.com>
3891 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3892 in a POINTER_PLUS_EXPR.
3894 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3895 Alan Hayward <alan.hayward@arm.com>
3896 David Sherwood <david.sherwood@arm.com>
3898 * omp-simd-clone.c (simd_clone_subparts): New function.
3899 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
3900 (ipa_simd_modify_function_body): Likewise.
3902 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3903 Alan Hayward <alan.hayward@arm.com>
3904 David Sherwood <david.sherwood@arm.com>
3906 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
3907 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
3908 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
3909 (expand_vector_condition, vector_element): Likewise.
3910 (subparts_gt): New function.
3911 (get_compute_type): Use subparts_gt.
3912 (count_type_subparts): Delete.
3913 (expand_vector_operations_1): Use subparts_gt instead of
3914 count_type_subparts.
3916 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3917 Alan Hayward <alan.hayward@arm.com>
3918 David Sherwood <david.sherwood@arm.com>
3920 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
3921 (vect_compile_time_alias): ...this new function. Do the calculation
3922 on poly_ints rather than trees.
3923 (vect_prune_runtime_alias_test_list): Update call accordingly.
3925 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3926 Alan Hayward <alan.hayward@arm.com>
3927 David Sherwood <david.sherwood@arm.com>
3929 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
3931 (vect_schedule_slp_instance): Likewise.
3933 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3934 Alan Hayward <alan.hayward@arm.com>
3935 David Sherwood <david.sherwood@arm.com>
3937 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
3938 constant and extern definitions for variable-length vectors.
3939 (vect_get_constant_vectors): Note that the number of units
3940 is known to be constant.
3942 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3943 Alan Hayward <alan.hayward@arm.com>
3944 David Sherwood <david.sherwood@arm.com>
3946 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
3947 of units as polynomial. Choose between WIDE and NARROW based
3950 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3951 Alan Hayward <alan.hayward@arm.com>
3952 David Sherwood <david.sherwood@arm.com>
3954 * tree-vect-stmts.c (simd_clone_subparts): New function.
3955 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
3957 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3958 Alan Hayward <alan.hayward@arm.com>
3959 David Sherwood <david.sherwood@arm.com>
3961 * tree-vect-stmts.c (vectorizable_call): Treat the number of
3962 vectors as polynomial. Use build_index_vector for
3965 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3966 Alan Hayward <alan.hayward@arm.com>
3967 David Sherwood <david.sherwood@arm.com>
3969 * tree-vect-stmts.c (get_load_store_type): Treat the number of
3970 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
3971 for variable-length vectors.
3972 (vectorizable_mask_load_store): Treat the number of units as
3973 polynomial, asserting that it is constant if the condition has
3974 already been enforced.
3975 (vectorizable_store, vectorizable_load): Likewise.
3977 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3978 Alan Hayward <alan.hayward@arm.com>
3979 David Sherwood <david.sherwood@arm.com>
3981 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
3982 of units as polynomial. Punt if we can't tell at compile time
3983 which vector contains the final result.
3985 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3986 Alan Hayward <alan.hayward@arm.com>
3987 David Sherwood <david.sherwood@arm.com>
3989 * tree-vect-loop.c (vectorizable_induction): Treat the number
3990 of units as polynomial. Punt on SLP inductions. Use an integer
3991 VEC_SERIES_EXPR for variable-length integer reductions. Use a
3992 cast of such a series for variable-length floating-point
3995 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3996 Alan Hayward <alan.hayward@arm.com>
3997 David Sherwood <david.sherwood@arm.com>
3999 * tree.h (build_index_vector): Declare.
4000 * tree.c (build_index_vector): New function.
4001 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4002 of units as polynomial, forcibly converting it to a constant if
4003 vectorizable_reduction has already enforced the condition.
4004 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4005 to create a {1,2,3,...} vector.
4006 (vectorizable_reduction): Treat the number of units as polynomial.
4007 Choose vectype_in based on the largest scalar element size rather
4008 than the smallest number of units. Enforce the restrictions
4011 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4012 Alan Hayward <alan.hayward@arm.com>
4013 David Sherwood <david.sherwood@arm.com>
4015 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4016 number of units as polynomial.
4018 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4019 Alan Hayward <alan.hayward@arm.com>
4020 David Sherwood <david.sherwood@arm.com>
4022 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4023 * target.def (autovectorize_vector_sizes): Return the vector sizes
4024 by pointer, using vector_sizes rather than a bitmask.
4025 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4026 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4027 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4029 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4030 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4031 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4032 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4033 * omp-general.c (omp_max_vf): Likewise.
4034 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4035 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4036 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4037 * tree-vect-slp.c (vect_slp_bb): Likewise.
4038 * doc/tm.texi: Regenerate.
4039 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4041 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4042 the vector size as a poly_uint64 rather than an unsigned int.
4043 (current_vector_size): Change from an unsigned int to a poly_uint64.
4044 (get_vectype_for_scalar_type): Update accordingly.
4045 * tree.h (build_truth_vector_type): Take the size and number of
4046 units as a poly_uint64 rather than an unsigned int.
4047 (build_vector_type): Add a temporary overload that takes
4048 the number of units as a poly_uint64 rather than an unsigned int.
4049 * tree.c (make_vector_type): Likewise.
4050 (build_truth_vector_type): Take the number of units as a poly_uint64
4051 rather than an unsigned int.
4053 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4054 Alan Hayward <alan.hayward@arm.com>
4055 David Sherwood <david.sherwood@arm.com>
4057 * target.def (get_mask_mode): Take the number of units and length
4058 as poly_uint64s rather than unsigned ints.
4059 * targhooks.h (default_get_mask_mode): Update accordingly.
4060 * targhooks.c (default_get_mask_mode): Likewise.
4061 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4062 * doc/tm.texi: Regenerate.
4064 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4065 Alan Hayward <alan.hayward@arm.com>
4066 David Sherwood <david.sherwood@arm.com>
4068 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4069 * omp-general.c (omp_max_vf): Likewise.
4070 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4071 (expand_omp_simd): Handle polynomial safelen.
4072 * omp-low.c (omplow_simd_context): Add a default constructor.
4073 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4074 (lower_rec_simd_input_clauses): Update accordingly.
4075 (lower_rec_input_clauses): Likewise.
4077 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4078 Alan Hayward <alan.hayward@arm.com>
4079 David Sherwood <david.sherwood@arm.com>
4081 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4082 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4083 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4084 (vect_analyze_slp_cost): Likewise.
4085 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4086 (vect_model_load_cost): Likewise.
4088 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4089 Alan Hayward <alan.hayward@arm.com>
4090 David Sherwood <david.sherwood@arm.com>
4092 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4093 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4094 from an unsigned int * to a poly_uint64_pod *.
4095 (calculate_unrolling_factor): New function.
4096 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4098 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4099 Alan Hayward <alan.hayward@arm.com>
4100 David Sherwood <david.sherwood@arm.com>
4102 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4103 from an unsigned int to a poly_uint64.
4104 (_loop_vec_info::slp_unrolling_factor): Likewise.
4105 (_loop_vec_info::vectorization_factor): Change from an int
4107 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4108 (vect_get_num_vectors): New function.
4109 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4110 (vect_get_num_copies): Use vect_get_num_vectors.
4111 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4112 to an unsigned int *.
4113 (vect_analyze_data_refs): Change min_vf from an int * to a
4115 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4116 than an unsigned HOST_WIDE_INT.
4117 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4118 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4119 to an unsigned int *.
4120 (vect_analyze_data_ref_dependences): Likewise.
4121 (vect_compute_data_ref_alignment): Handle polynomial vf.
4122 (vect_enhance_data_refs_alignment): Likewise.
4123 (vect_prune_runtime_alias_test_list): Likewise.
4124 (vect_shift_permute_load_chain): Likewise.
4125 (vect_supportable_dr_alignment): Likewise.
4126 (dependence_distance_ge_vf): Take the vectorization factor as a
4127 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4128 (vect_analyze_data_refs): Change min_vf from an int * to a
4130 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4131 vfm1 as a poly_uint64 rather than an int. Make the same change
4132 for the returned bound_scalar.
4133 (vect_gen_vector_loop_niters): Handle polynomial vf.
4134 (vect_do_peeling): Likewise. Update call to
4135 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4136 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4138 * tree-vect-loop.c (vect_determine_vectorization_factor)
4139 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4140 (vect_get_known_peeling_cost): Likewise.
4141 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4142 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4143 (vect_transform_loop): Likewise. Use the lowest possible VF when
4144 updating the upper bounds of the loop.
4145 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4147 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4148 polynomial unroll factors.
4149 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4150 (vect_make_slp_decision): Likewise.
4151 (vect_supported_load_permutation_p): Likewise, and polynomial
4153 (vect_analyze_slp_cost): Handle polynomial vf.
4154 (vect_slp_analyze_node_operations): Likewise.
4155 (vect_slp_analyze_bb_1): Likewise.
4156 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4157 than an unsigned HOST_WIDE_INT.
4158 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4159 (vectorizable_load): Handle polynomial vf.
4160 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4162 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4164 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4165 Alan Hayward <alan.hayward@arm.com>
4166 David Sherwood <david.sherwood@arm.com>
4168 * match.pd: Handle bit operations involving three constants
4169 and try to fold one pair.
4171 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4173 * tree-vect-loop-manip.c: Include gimple-fold.h.
4174 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4175 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4176 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4177 Add a path that uses a step of VF instead of 1, but disable it
4179 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4180 and niters_no_overflow parameters. Update calls to
4181 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4182 Create a new SSA name if the latter choses to use a ste other
4183 than zero, and return it via niters_vector_mult_vf_var.
4184 * tree-vect-loop.c (vect_transform_loop): Update calls to
4185 vect_do_peeling, vect_gen_vector_loop_niters and
4186 slpeel_make_loop_iterate_ntimes.
4187 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4188 (vect_gen_vector_loop_niters): Update declarations after above changes.
4190 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4192 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4193 128-bit round to integer instructions.
4194 (ceil<mode>2): Likewise.
4195 (btrunc<mode>2): Likewise.
4196 (round<mode>2): Likewise.
4198 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4200 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4201 unaligned VSX load/store on P8/P9.
4202 (expand_block_clear): Allow the use of unaligned VSX
4203 load/store on P8/P9.
4205 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4207 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4209 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4210 swap associated with both a load and a store.
4212 2018-01-02 Andrew Waterman <andrew@sifive.com>
4214 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4215 * config/riscv/riscv.md (clear_cache): Use it.
4217 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4219 * web.c: Remove out-of-date comment.
4221 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4223 * expr.c (fixup_args_size_notes): Check that any existing
4224 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4225 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4226 (emit_single_push_insn): ...here.
4228 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4230 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4231 (const_vector_encoded_nelts): New function.
4232 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4233 (const_vector_int_elt, const_vector_elt): Declare.
4234 * emit-rtl.c (const_vector_int_elt_1): New function.
4235 (const_vector_elt): Likewise.
4236 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4237 of CONST_VECTOR_ELT.
4239 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4241 * expr.c: Include rtx-vector-builder.h.
4242 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4243 directly on the tree encoding.
4244 (const_vector_from_tree): Likewise.
4245 * optabs.c: Include rtx-vector-builder.h.
4246 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4247 sequence of "u" values.
4248 * vec-perm-indices.c: Include rtx-vector-builder.h.
4249 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4250 directly on the vec_perm_indices encoding.
4252 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4254 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4255 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4256 * rtx-vector-builder.h: New file.
4257 * rtx-vector-builder.c: Likewise.
4258 * rtl.h (rtx_def::u2): Add a const_vector field.
4259 (CONST_VECTOR_NPATTERNS): New macro.
4260 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4261 (CONST_VECTOR_DUPLICATE_P): Likewise.
4262 (CONST_VECTOR_STEPPED_P): Likewise.
4263 (CONST_VECTOR_ENCODED_ELT): Likewise.
4264 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4265 (unwrap_const_vec_duplicate): Likewise.
4266 (const_vec_series_p): Check for a non-duplicated vector encoding.
4267 Say that the function only returns true for integer vectors.
4268 * emit-rtl.c: Include rtx-vector-builder.h.
4269 (gen_const_vec_duplicate_1): Delete.
4270 (gen_const_vector): Call gen_const_vec_duplicate instead of
4271 gen_const_vec_duplicate_1.
4272 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4273 (gen_const_vec_duplicate): Use rtx_vector_builder.
4274 (gen_const_vec_series): Likewise.
4275 (gen_rtx_CONST_VECTOR): Likewise.
4276 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4277 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4278 Build a new vector rather than modifying a CONST_VECTOR in-place.
4279 (handle_special_swappables): Update call accordingly.
4280 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4281 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4282 Build a new vector rather than modifying a CONST_VECTOR in-place.
4283 (handle_special_swappables): Update call accordingly.
4285 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4287 * simplify-rtx.c (simplify_const_binary_operation): Use
4288 CONST_VECTOR_ELT instead of XVECEXP.
4290 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4292 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4293 the selector elements to be different from the data elements
4294 if the selector is a VECTOR_CST.
4295 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4296 ssizetype for the selector.
4298 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4300 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4301 before testing each element individually.
4302 * tree-vect-generic.c (lower_vec_perm): Likewise.
4304 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4306 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4307 * selftest-run-tests.c (selftest::run_tests): Call it.
4308 * vector-builder.h (vector_builder::operator ==): New function.
4309 (vector_builder::operator !=): Likewise.
4310 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4311 (vec_perm_indices::all_from_input_p): New function.
4312 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4313 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4314 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4315 instead of reading the VECTOR_CST directly. Detect whether both
4316 vector inputs are the same before constructing the vec_perm_indices,
4317 and update the number of inputs argument accordingly. Use the
4318 utility functions added above. Only construct sel2 if we need to.
4320 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4322 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4323 the broadcast of the low byte.
4324 (expand_mult_highpart): Use an explicit encoding for the permutes.
4325 * optabs-query.c (can_mult_highpart_p): Likewise.
4326 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4327 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4328 (vectorizable_bswap): Likewise.
4329 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4330 explicit encoding for the power-of-2 permutes.
4331 (vect_permute_store_chain): Likewise.
4332 (vect_grouped_load_supported): Likewise.
4333 (vect_permute_load_chain): Likewise.
4335 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4337 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4338 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4339 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4340 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4341 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4342 (vect_gen_perm_mask_any): Likewise.
4344 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4346 * int-vector-builder.h: New file.
4347 * vec-perm-indices.h: Include int-vector-builder.h.
4348 (vec_perm_indices): Redefine as an int_vector_builder.
4349 (auto_vec_perm_indices): Delete.
4350 (vec_perm_builder): Redefine as a stand-alone class.
4351 (vec_perm_indices::vec_perm_indices): New function.
4352 (vec_perm_indices::clamp): Likewise.
4353 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4354 (vec_perm_indices::new_vector): New function.
4355 (vec_perm_indices::new_expanded_vector): Update for new
4356 vec_perm_indices class.
4357 (vec_perm_indices::rotate_inputs): New function.
4358 (vec_perm_indices::all_in_range_p): Operate directly on the
4359 encoded form, without computing elided elements.
4360 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4361 encoding. Update for new vec_perm_indices class.
4362 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4363 the given vec_perm_builder.
4364 (expand_vec_perm_var): Update vec_perm_builder constructor.
4365 (expand_mult_highpart): Use vec_perm_builder instead of
4366 auto_vec_perm_indices.
4367 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4368 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4369 or double series encoding as appropriate.
4370 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4371 vec_perm_indices instead of auto_vec_perm_indices.
4372 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4373 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4374 (vect_permute_store_chain): Likewise.
4375 (vect_grouped_load_supported): Likewise.
4376 (vect_permute_load_chain): Likewise.
4377 (vect_shift_permute_load_chain): Likewise.
4378 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4379 (vect_transform_slp_perm_load): Likewise.
4380 (vect_schedule_slp_instance): Likewise.
4381 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4382 (vectorizable_mask_load_store): Likewise.
4383 (vectorizable_bswap): Likewise.
4384 (vectorizable_store): Likewise.
4385 (vectorizable_load): Likewise.
4386 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4387 vec_perm_indices instead of auto_vec_perm_indices. Use
4388 tree_to_vec_perm_builder to read the vector from a tree.
4389 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4390 vec_perm_builder instead of a vec_perm_indices.
4391 (have_whole_vector_shift): Use vec_perm_builder and
4392 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4393 truncation to calc_vec_perm_mask_for_shift.
4394 (vect_create_epilog_for_reduction): Likewise.
4395 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4396 from auto_vec_perm_indices to vec_perm_indices.
4397 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4398 instead of changing individual elements.
4399 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4400 the vector in d.perm.
4401 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4402 from auto_vec_perm_indices to vec_perm_indices.
4403 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4404 instead of changing individual elements.
4405 (arm_vectorize_vec_perm_const): Use new_vector to install
4406 the vector in d.perm.
4407 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4408 Update vec_perm_builder constructor.
4409 (rs6000_expand_interleave): Likewise.
4410 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4411 (rs6000_expand_interleave): Likewise.
4413 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4415 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4416 to qimode could truncate the indices.
4417 * optabs.c (expand_vec_perm_var): Likewise.
4419 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4421 * Makefile.in (OBJS): Add vec-perm-indices.o.
4422 * vec-perm-indices.h: New file.
4423 * vec-perm-indices.c: Likewise.
4424 * target.h (vec_perm_indices): Replace with a forward class
4426 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4427 * optabs.h: Include vec-perm-indices.h.
4428 (expand_vec_perm): Delete.
4429 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4430 (expand_vec_perm_const): Declare.
4431 * target.def (vec_perm_const_ok): Replace with...
4432 (vec_perm_const): ...this new hook.
4433 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4434 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4435 * doc/tm.texi: Regenerate.
4436 * optabs.def (vec_perm_const): Delete.
4437 * doc/md.texi (vec_perm_const): Likewise.
4438 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4439 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4440 expand_vec_perm for constant permutation vectors. Assert that
4441 the mode of variable permutation vectors is the integer equivalent
4442 of the mode that is being permuted.
4443 * optabs-query.h (selector_fits_mode_p): Declare.
4444 * optabs-query.c: Include vec-perm-indices.h.
4445 (selector_fits_mode_p): New function.
4446 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4447 is defined, instead of checking whether the vec_perm_const_optab
4448 exists. Use targetm.vectorize.vec_perm_const instead of
4449 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4450 fit in the vector mode before using a variable permute.
4451 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4452 vec_perm_indices instead of an rtx.
4453 (expand_vec_perm): Replace with...
4454 (expand_vec_perm_const): ...this new function. Take the selector
4455 as a vec_perm_indices rather than an rtx. Also take the mode of
4456 the selector. Update call to shift_amt_for_vec_perm_mask.
4457 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4458 Use vec_perm_indices::new_expanded_vector to expand the original
4459 selector into bytes. Check whether the indices fit in the vector
4460 mode before using a variable permute.
4461 (expand_vec_perm_var): Make global.
4462 (expand_mult_highpart): Use expand_vec_perm_const.
4463 * fold-const.c: Includes vec-perm-indices.h.
4464 * tree-ssa-forwprop.c: Likewise.
4465 * tree-vect-data-refs.c: Likewise.
4466 * tree-vect-generic.c: Likewise.
4467 * tree-vect-loop.c: Likewise.
4468 * tree-vect-slp.c: Likewise.
4469 * tree-vect-stmts.c: Likewise.
4470 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4472 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4473 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4474 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4475 (aarch64_vectorize_vec_perm_const): ...this new function.
4476 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4477 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4478 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4479 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4480 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4481 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4482 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4484 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4485 check for NEON modes.
4486 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4487 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4488 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4489 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4491 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4492 the old VEC_PERM_CONST conditions.
4493 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4494 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4495 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4496 (ia64_vectorize_vec_perm_const_ok): Merge into...
4497 (ia64_vectorize_vec_perm_const): ...this new function.
4498 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4499 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4500 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4501 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4502 * config/mips/mips.c (mips_expand_vec_perm_const)
4503 (mips_vectorize_vec_perm_const_ok): Merge into...
4504 (mips_vectorize_vec_perm_const): ...this new function.
4505 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4506 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4507 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4508 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4509 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4510 (rs6000_expand_vec_perm_const): Delete.
4511 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4513 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4514 (altivec_expand_vec_perm_const_le): Take each operand individually.
4515 Operate on constant selectors rather than rtxes.
4516 (altivec_expand_vec_perm_const): Likewise. Update call to
4517 altivec_expand_vec_perm_const_le.
4518 (rs6000_expand_vec_perm_const): Delete.
4519 (rs6000_vectorize_vec_perm_const_ok): Delete.
4520 (rs6000_vectorize_vec_perm_const): New function.
4521 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4522 an element count and rtx array.
4523 (rs6000_expand_extract_even): Update call accordingly.
4524 (rs6000_expand_interleave): Likewise.
4525 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4526 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4527 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4528 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4529 (rs6000_expand_vec_perm_const): Delete.
4530 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4531 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4532 (altivec_expand_vec_perm_const_le): Take each operand individually.
4533 Operate on constant selectors rather than rtxes.
4534 (altivec_expand_vec_perm_const): Likewise. Update call to
4535 altivec_expand_vec_perm_const_le.
4536 (rs6000_expand_vec_perm_const): Delete.
4537 (rs6000_vectorize_vec_perm_const_ok): Delete.
4538 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4539 reference to the SPE evmerge intructions.
4540 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4541 an element count and rtx array.
4542 (rs6000_expand_extract_even): Update call accordingly.
4543 (rs6000_expand_interleave): Likewise.
4544 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4545 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4547 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4549 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4551 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4552 vector mode and that that mode matches the mode of the data
4554 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4555 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4556 directly using expand_vec_perm_1 when forcing selectors into
4558 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4560 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4562 * optabs-query.h (can_vec_perm_p): Delete.
4563 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4564 * optabs-query.c (can_vec_perm_p): Split into...
4565 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4566 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4567 particular selector is valid.
4568 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4569 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4570 (vect_grouped_load_supported): Likewise.
4571 (vect_shift_permute_load_chain): Likewise.
4572 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4573 (vect_transform_slp_perm_load): Likewise.
4574 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4575 (vectorizable_bswap): Likewise.
4576 (vect_gen_perm_mask_checked): Likewise.
4577 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4578 implementations of variable permutation vectors into account
4579 when deciding which selector to use.
4580 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4581 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4582 with a false third argument.
4583 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4584 to test whether the constant selector is valid and can_vec_perm_var_p
4585 to test whether a variable selector is valid.
4587 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4589 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4590 * optabs-query.c (can_vec_perm_p): Likewise.
4591 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4592 instead of vec_perm_indices.
4593 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4594 (vect_gen_perm_mask_checked): Likewise,
4595 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4596 (vect_gen_perm_mask_checked): Likewise,
4598 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4600 * optabs-query.h (qimode_for_vec_perm): Declare.
4601 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4602 (qimode_for_vec_perm): ...this new function.
4603 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4605 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4607 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4608 does not have a conditional at the top.
4610 2018-01-02 Richard Biener <rguenther@suse.de>
4612 * ipa-inline.c (big_speedup_p): Fix expression.
4614 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4617 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4620 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4624 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4625 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4626 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4627 cond_taken_branch_cost 3->4.
4629 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4631 PR tree-optimization/83581
4632 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4633 TODO_cleanup_cfg if any changes have been made.
4636 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4637 convert_modes if target mode has the right side, but different mode
4641 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4642 last argument when extracting from CONCAT. If either from_real or
4643 from_imag is NULL, use expansion through memory. If result is not
4644 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4645 the parts directly to inner mode, if even that fails, use expansion
4649 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4650 check for bswap in mode rather than HImode and use that in expand_unop
4653 Copyright (C) 2018 Free Software Foundation, Inc.
4655 Copying and distribution of this file, with or without modification,
4656 are permitted in any medium without royalty provided the copyright
4657 notice and this notice are preserved.