From cffe61e776f044c2ce80e7ebe2108ce09c952715 Mon Sep 17 00:00:00 2001
From: "H. Peter Anvin" <hpa@linux.intel.com>
Date: Thu, 7 Jul 2011 17:21:24 -0700
Subject: [PATCH] Use a normal quad-case for valueless /is4

When we don't have an immediate for the i-field in /is4, then use a
normal quad-bytecode encoding for it to save some small amount of
space and re-use existing machinery.

Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
---
 assemble.c | 11 ++++++-----
 disasm.c   |  7 +++----
 insns.pl   |  7 ++++---
 3 files changed, 13 insertions(+), 12 deletions(-)

diff --git a/assemble.c b/assemble.c
index 17def3aa..fd78b21c 100644
--- a/assemble.c
+++ b/assemble.c
@@ -70,7 +70,7 @@
  *                 the 4-bit immediate from operand b in bits 3..0.
  * \173\xab      - the register number from operand a in bits 7..4, with
  *                 the value b in bits 3..0.
- * \174\a        - the register number from operand a in bits 7..4, and
+ * \174..\177    - the register number from operand 0..3 in bits 7..4, and
  *                 an arbitrary value in bits 3..0 (assembled as zero.)
  * \2ab          - a ModRM, calculated on EA in operand a, with the spare
  *                 field equal to digit b.
@@ -903,11 +903,14 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
 
         case 0172:
         case 0173:
-        case 0174:
             codes++;
             length++;
             break;
 
+        case4(0174):
+            length++;
+            break;
+
         case4(0250):
             length += is_sbyte32(opx) ? 1 : 4;
             break;
@@ -1495,9 +1498,7 @@ static void gencode(int32_t segment, int64_t offset, int bits,
             offset++;
             break;
 
-        case 0174:
-            c = *codes++;
-            opx = &ins->oprs[c];
+        case4(0174):
             bytes[0] = nasm_regvals[opx->basereg] << 4;
             out(offset, segment, bytes, OUT_RAWDATA, 1, NO_SEG, NO_SEG);
             offset++;
diff --git a/disasm.c b/disasm.c
index 5c9d6db7..e9d1763e 100644
--- a/disasm.c
+++ b/disasm.c
@@ -621,13 +621,12 @@ static int matches(const struct itemplate *t, uint8_t *data,
 	}
 	break;
 
-	case 0174:
+	case4(0174):
 	{
 	    uint8_t ximm = *data++;
-	    c = *r++;
 
-	    ins->oprs[c].basereg = (ximm >> 4) & regmask;
-	    ins->oprs[c].segment |= SEG_RMREG;
+	    opx->basereg = (ximm >> 4) & regmask;
+	    opx->segment |= SEG_RMREG;
 	}
 	break;
 
diff --git a/insns.pl b/insns.pl
index 6db1c82c..886c429e 100755
--- a/insns.pl
+++ b/insns.pl
@@ -409,7 +409,7 @@ sub count_bytecodes(@) {
             $skip = 1;
         } elsif (($bc & ~013) == 0144) {
             $skip = 1;
-        } elsif ($bc == 0172) {
+        } elsif ($bc == 0172 || $bc == 0173) {
             $skip = 1;
         } elsif ($bc >= 0260 && $bc <= 0270) {
             $skip = 2;
@@ -626,7 +626,7 @@ sub startseq($$) {
             $c = ($m >> 6);
             $m = $m & 31;
             $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 3);
-        } elsif ($c0 >= 0172 && $c0 <= 174) {
+        } elsif ($c0 >= 0172 && $c0 <= 173) {
             shift(@codes);	# Skip is4 control byte
         } else {
             # We really need to be able to distinguish "forbidden"
@@ -890,7 +890,8 @@ sub byte_code_compile($$) {
             if (defined($oppos{'i'})) {
                 push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
             } else {
-                push(@codes, 0174, $oppos{'s'});
+		push(@codes, 05) if ($oppos{'s'} & 4);
+                push(@codes, 0174+($oppos{'s'} & 3));
             }
             $prefix_ok = 0;
         } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
-- 
2.11.4.GIT