| commit | 3ea3fcf78a5532e118856846df8adbf3f60ef716 | |
| author | Rich Felker <dalias@aerifal.cx> | |
| Thu, 29 Feb 2024 16:02:29 +0000 (29 11:02 -0500) | ||
| committer | Rich Felker <dalias@aerifal.cx> | |
| Thu, 29 Feb 2024 21:36:55 +0000 (29 16:36 -0500) | ||
| tree | afb3892aac50017bea2f71fbd8067a39886a8447 | treesnapshot (tar.gz zip) |
| parent | b28c44de8c3131b45588f61569b1711c987ba1c3 | commitdiff |
riscv32: add sysvipc msg/sem/shm bits
despite riscv32 being natively time64, the IPC_TIME64 bit (0x100) is
set in IPC_STAT and derived command macros, differentiating their
values from the raw command values used to interface with the kernel.
this reflects that the kernel ipc structure types are not natively
time64, but have broken-down hi/lo fields that cannot be used in-place
and require translation, and that the userspace struct types differ
from the kernel types (relevant to things like strace).
despite riscv32 being natively time64, the IPC_TIME64 bit (0x100) is
set in IPC_STAT and derived command macros, differentiating their
values from the raw command values used to interface with the kernel.
this reflects that the kernel ipc structure types are not natively
time64, but have broken-down hi/lo fields that cannot be used in-place
and require translation, and that the userspace struct types differ
from the kernel types (relevant to things like strace).
| arch/riscv32/bits/ipcstat.h | [new file with mode: 0644] | blob |
| arch/riscv32/bits/msg.h | [new file with mode: 0644] | blob |
| arch/riscv32/bits/sem.h | [new file with mode: 0644] | blob |
| arch/riscv32/bits/shm.h | [new file with mode: 0644] | blob |