| commit | 06b7a7a5ec917761969444fee967c43868a76468 | |
| author | Andi Kleen <ak@linux.intel.com> | |
| Mon, 27 Apr 2009 16:37:43 +0000 (27 18:37 +0200) | ||
| committer | H. Peter Anvin <hpa@zytor.com> | |
| Thu, 28 May 2009 16:24:12 +0000 (28 09:24 -0700) | ||
| tree | fc59ae3ccbb90d61bd7be9240a61c4bd31794cec | treesnapshot (tar.gz zip) |
| parent | 3cde5c8c839bf46a7be799ed0e1d0b4780aaf794 | commitdiff |
x86, mce: implement the PPro bank 0 quirk in the 64bit machine check code
Quoting the comment:
* SDM documents that on family 6 bank 0 should not be written
* because it aliases to another special BIOS controlled
* register.
* But it's not aliased anymore on model 0x1a+
* Don't ignore bank 0 completely because there could be a valid
* event later, merely don't write CTL0.
This is mostly a port on the 32bit code, except that 32bit
always didn't write it and didn't have the 0x1a heuristic. I checked
with the CPU designers that the quirk is not required starting with
this model.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Quoting the comment:
* SDM documents that on family 6 bank 0 should not be written
* because it aliases to another special BIOS controlled
* register.
* But it's not aliased anymore on model 0x1a+
* Don't ignore bank 0 completely because there could be a valid
* event later, merely don't write CTL0.
This is mostly a port on the 32bit code, except that 32bit
always didn't write it and didn't have the 0x1a heuristic. I checked
with the CPU designers that the quirk is not required starting with
this model.
Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Hidetoshi Seto <seto.hidetoshi@jp.fujitsu.com>
Signed-off-by: H. Peter Anvin <hpa@zytor.com>
| arch/x86/kernel/cpu/mcheck/mce.c | diffblobblamehistory |