| commit | 068258bc15439c11a966e873f931cc8e513dca61 | |
| author | Yinghai Lu <yinghai@kernel.org> | |
| Fri, 20 Mar 2009 03:55:35 +0000 (19 20:55 -0700) | ||
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | |
| Fri, 20 Mar 2009 18:40:22 +0000 (20 11:40 -0700) | ||
| tree | 956f247105e770adffc1fca68820668a73b484a9 | treesnapshot (tar.gz zip) |
| parent | fafad5bf06c3a3bb8b24b28b6f065367e7411872 | commitdiff |
x86/PCI: host mmconfig detect clean up
Fix mmconfig detection to not assume a single mmconfig space in the
northbridge, paving the way for AMD fam10h + mcp55 CPUs. On those, the
MSR has some range, but the mcp55 pci config will have another one.
Also helps the mcp55 + io55 case, where every one will have one range.
If it is mcp55, exclude the range that is used by CPU MSR, in other
words , if the CPU claims busses 0-255, the range in mcp55 is dropped,
because CPU HW will not route those ranges to mcp55 mmconfig to handle
it.
Signed-off-by: Yinghai Lu <yinghai.lu@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Fix mmconfig detection to not assume a single mmconfig space in the
northbridge, paving the way for AMD fam10h + mcp55 CPUs. On those, the
MSR has some range, but the mcp55 pci config will have another one.
Also helps the mcp55 + io55 case, where every one will have one range.
If it is mcp55, exclude the range that is used by CPU MSR, in other
words , if the CPU claims busses 0-255, the range in mcp55 is dropped,
because CPU HW will not route those ranges to mcp55 mmconfig to handle
it.
Signed-off-by: Yinghai Lu <yinghai.lu@kernel.org>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| arch/x86/pci/mmconfig-shared.c | diffblobblamehistory | |
| arch/x86/pci/mmconfig_64.c | diffblobblamehistory |