ARM: pxa168: correct nand pmu setting
commitb3275e80eef9961924994dafccb41b710e9c6836
authorLei Wen <leiwen@marvell.com>
Tue, 21 Jun 2011 12:37:47 +0000 (21 05:37 -0700)
committerGreg Kroah-Hartman <gregkh@suse.de>
Wed, 3 Aug 2011 19:42:27 +0000 (3 12:42 -0700)
tree4fabd6eb9d4e9257b2f43f9a10f1360cd3408e0f
parentd00726a966330f798b9cb055611be5d11547dbdd
ARM: pxa168: correct nand pmu setting

commit 6662498e132dfa758925a160fd5ef80a083651c3 upstream.

The original pair of <0x01db, 208000000> is invalid. Correct it to
the valid value.

The 6th bit of the NFC APMU register indicates NFC works whether
at 156Mhz or 78Mhz. So 0x19b indicates NFC works at 156Mhz, and
0x1db indicates it works at 78Mhz.

Signed-off-by: Lei Wen <leiwen@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
arch/arm/mach-mmp/pxa168.c