| commit | a505addc366525cd8d9358298be0dc8655be5953 | |
| author | Will Deacon <will.deacon@arm.com> | |
| Tue, 19 Jul 2011 12:53:36 +0000 (19 13:53 +0100) | ||
| committer | Will Deacon <will.deacon@arm.com> | |
| Wed, 31 Aug 2011 09:18:01 +0000 (31 10:18 +0100) | ||
| tree | 3a2fcfc4ed7659bed5743558ec2fcd937dfa889c | treesnapshot (tar.gz zip) |
| parent | 05d22fde3c0b86c8395d8f12ac01fbbc524d73ca | commitdiff |
ARM: perf: add mode exclusion for Cortex-A15 PMU
The Cortex-A15 PMU implements the PMUv2 specification and therefore
has support for some mode exclusion.
This patch adds support for excluding user, kernel and hypervisor counts
from a given event.
Acked-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
The Cortex-A15 PMU implements the PMUv2 specification and therefore
has support for some mode exclusion.
This patch adds support for excluding user, kernel and hypervisor counts
from a given event.
Acked-by: Jamie Iles <jamie@jamieiles.com>
Reviewed-by: Jean Pihet <j-pihet@ti.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| arch/arm/kernel/perf_event_v7.c | diffblobblamehistory |