| commit | 8e9e725ffc95ba048f6656dec816b6f1cef90722 | |
| author | Carolyn Wyborny <carolyn.wyborny@intel.com> | |
| Sat, 25 Jun 2011 13:18:12 +0000 (25 13:18 +0000) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Mon, 29 Aug 2011 21:33:04 +0000 (29 14:33 -0700) | ||
| tree | d94db09b24d67b14ad1121231ac18c2068f21189 | treesnapshot (tar.gz zip) |
| parent | 54535f716d3f635179a8033a8dab6306ef5cb90e | commitdiff |
igb: Fix lack of flush after register write and before delay
commit 064b43304ed8ede8e13ff7b4338d09fd37bcffb1 upstream.
Register writes followed by a delay are required to have a flush
before the delay in order to commit the values to the register. Without
the flush, the code following the delay may not function correctly.
Reported-by: Tong Ho <tong.ho@ericsson.com>
Reported-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit 064b43304ed8ede8e13ff7b4338d09fd37bcffb1 upstream.
Register writes followed by a delay are required to have a flush
before the delay in order to commit the values to the register. Without
the flush, the code following the delay may not function correctly.
Reported-by: Tong Ho <tong.ho@ericsson.com>
Reported-by: Guenter Roeck <guenter.roeck@ericsson.com>
Signed-off-by: Carolyn Wyborny <carolyn.wyborny@intel.com>
Tested-by: Aaron Brown <aaron.f.brown@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| drivers/net/igb/e1000_82575.c | diffblobblamehistory |