gianfar: fix fiper alignment after resetting the time
commit716fa319182000c26521cb2bd4ea034256230f5d
authorRichard Cochran <richardcochran@gmail.com>
Sat, 6 Aug 2011 21:03:03 +0000 (6 21:03 +0000)
committerGreg Kroah-Hartman <gregkh@suse.de>
Tue, 16 Aug 2011 01:31:42 +0000 (15 18:31 -0700)
treeb60e367bb09498a1742767092751dab9749fd9e4
parent716ae31687f2d778ff9a18e7286deca992dfa955
gianfar: fix fiper alignment after resetting the time

commit cbc056602c7c63620c86904c431ff6b61e029dcc upstream.

After resetting the time, the PPS signals on the FIPER output channels
are incorrectly offset from the clock time, as can be readily verified
by a looping back the FIPER to the external time stamp input.

Despite its name, setting the "Fiper Realignment Disable" bit seems to
fix the problem, at least on the P2020.

Also, following the example code from the Freescale BSP, it is not really
necessary to disable and re-enable the timer in order to reprogram the
FIPER. (The documentation is rather unclear on this point. It seems that
writing to the alarm register also disables the FIPER.)

Signed-off-by: Richard Cochran <richard.cochran@omicron.at>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
drivers/net/gianfar_ptp.c