can: Fix SJA1000 command register writes on SMP systems
commit57c8a456640fa3ca777652f11f2db4179a3e66b6
authorOliver Hartkopp <socketcan@hartkopp.net>
Tue, 18 May 2010 21:03:10 +0000 (18 14:03 -0700)
committerDavid S. Miller <davem@davemloft.net>
Tue, 18 May 2010 21:03:10 +0000 (18 14:03 -0700)
treea290a904176384e1a9c80edc291f08286e23f3f3
parentb3bcb72edb29c52fb0a065d5b1c7cf40ed9287f4
can: Fix SJA1000 command register writes on SMP systems

The SJA1000 command register is concurrently written in the rx-path to free
the receive buffer _and_ in the tx-path to start the transmission.

The SJA1000 data sheet, 6.4.4 COMMAND REGISTER (CMR) states:
"Between two commands at least one internal clock cycle is needed in
order to proceed. The internal clock is half of the external oscillator
frequency."

On SMP systems the current implementation leads to a write stall in the
tx-path, which can be solved by adding some general locking and some time
to settle the write_reg() operation for the command register.

Thanks to Klaus Hitschler for the original fix and detailed problem
description.

This patch applies on net-2.6 and (with some offsets) on net-next-2.6 .

Signed-off-by: Oliver Hartkopp <socketcan@hartkopp.net>
Acked-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/can/sja1000/sja1000.c
drivers/net/can/sja1000/sja1000.h