| commit | 522bb748440e5765e6f73b417544f821e27940a9 | |
| author | Zhenyu Wang <zhenyuw@linux.intel.com> | |
| Wed, 2 Sep 2009 02:57:52 +0000 (2 10:57 +0800) | ||
| committer | Greg Kroah-Hartman <gregkh@suse.de> | |
| Mon, 5 Oct 2009 16:32:11 +0000 (5 09:32 -0700) | ||
| tree | b789ee5b0ff528f8773076b94febe4b6fd2817d0 | treesnapshot (tar.gz zip) |
| parent | 867d008ba440f7df63996722dc0f958b849291fb | commitdiff |
drm/i915: fix tiling on IGDNG
commit 553bd149bb2de7848b2b84642876f27202421368 upstream.
It seems that on IGDNG the same swizzling setup always applys.
And front buffer tiling needs to set address swizzle in display
arb control too.
Fix plane tricle feed setting in v1 which should be disable bit,
and always setup address swizzle to let hardware care for buffer
tiling in all cases.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
commit 553bd149bb2de7848b2b84642876f27202421368 upstream.
It seems that on IGDNG the same swizzling setup always applys.
And front buffer tiling needs to set address swizzle in display
arb control too.
Fix plane tricle feed setting in v1 which should be disable bit,
and always setup address swizzle to let hardware care for buffer
tiling in all cases.
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Eric Anholt <eric@anholt.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
| drivers/gpu/drm/i915/i915_gem_tiling.c | diffblobblamehistory | |
| drivers/gpu/drm/i915/i915_reg.h | diffblobblamehistory | |
| drivers/gpu/drm/i915/intel_display.c | diffblobblamehistory |