| commit | 33fb0e4eb53f16af312f9698f974e2e64af39c12 | |
| author | Andreas Herrmann <andreas.herrmann3@amd.com> | |
| Mon, 6 Oct 2008 22:11:22 +0000 (7 00:11 +0200) | ||
| committer | Ingo Molnar <mingo@elte.hu> | |
| Tue, 7 Oct 2008 04:42:58 +0000 (7 06:42 +0200) | ||
| tree | 32541197bec435bb19e5db7e2f3d963c24784e58 | treesnapshot (tar.gz zip) |
| parent | 4330ed8ed4da360ac1ca14b0fddff4c05b10de16 | commitdiff |
x86: SB450: skip IRQ0 override if it is not routed to INT2 of IOAPIC
On some HP nx6... laptops (e.g. nx6325) BIOS reports an IRQ0 override
but the SB450 chipset is configured such that timer interrupts goe to
INT0 of IOAPIC.
Check IRQ0 routing and if it is routed to INT0 of IOAPIC skip the
timer override.
[ This more generic PCI ID based quirk should alleviate the need for
dmi_ignore_irq0_timer_override DMI quirks. ]
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Acked-by: "Maciej W. Rozycki" <macro@linux-mips.org>
Tested-by: Dmitry Torokhov <dtor@mail.ru>
Cc: <stable@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
On some HP nx6... laptops (e.g. nx6325) BIOS reports an IRQ0 override
but the SB450 chipset is configured such that timer interrupts goe to
INT0 of IOAPIC.
Check IRQ0 routing and if it is routed to INT0 of IOAPIC skip the
timer override.
[ This more generic PCI ID based quirk should alleviate the need for
dmi_ignore_irq0_timer_override DMI quirks. ]
Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Acked-by: "Maciej W. Rozycki" <macro@linux-mips.org>
Tested-by: Dmitry Torokhov <dtor@mail.ru>
Cc: <stable@kernel.org>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| arch/x86/kernel/early-quirks.c | diffblobblamehistory |