| commit | 10a8c3839810ac9af1aec836d61b92e7a879f5fa | |
| author | Will Deacon <will.deacon@arm.com> | |
| Mon, 14 Mar 2011 13:00:30 +0000 (14 14:00 +0100) | ||
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | |
| Tue, 15 Mar 2011 09:42:28 +0000 (15 09:42 +0000) | ||
| tree | dbb67f0ed37857b92ee0098791d4d6e3d2a04d46 | treesnapshot (tar.gz zip) |
| parent | 6f685c5cdd29649cf8cc8f57c72791159f936e07 | commitdiff |
ARM: 6806/1: irq: introduce entry and exit functions for chained handlers
Some chained IRQ handlers are written to cope with primary chips of
potentially different flow types. Whether this a sensible thing to do
is a point of contention.
This patch introduces entry/exit functions for chained handlers which
infer the flow type of the primary chip as fasteoi or level-type by
checking whether or not the ->irq_eoi function pointer is present and
calling back to the primary chip as necessary. Other methods of flow
control are not considered.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Some chained IRQ handlers are written to cope with primary chips of
potentially different flow types. Whether this a sensible thing to do
is a point of contention.
This patch introduces entry/exit functions for chained handlers which
infer the flow type of the primary chip as fasteoi or level-type by
checking whether or not the ->irq_eoi function pointer is present and
calling back to the primary chip as necessary. Other methods of flow
control are not considered.
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
| arch/arm/include/asm/mach/irq.h | diffblobblamehistory |