include/linux/mtd/doc2000.h

   1 /*
   2  * Linux driver for Disk-On-Chip devices
   3  *
   4  * Copyright (C) 1999 Machine Vision Holdings, Inc.
   5  * Copyright (C) 2001-2003 David Woodhouse <dwmw2@infradead.org>
   6  * Copyright (C) 2002-2003 Greg Ungerer <gerg@snapgear.com>
   7  * Copyright (C) 2002-2003 SnapGear Inc
   8  *
   9  * $Id: doc2000.h,v 1.25 2005/11/07 11:14:54 gleixner Exp $
  10  *
  11  * Released under GPL
  12  */
  13
  14 #ifndef __MTD_DOC2000_H__
  15 #define __MTD_DOC2000_H__
  16
  17 #include <linux/mtd/mtd.h>
  18 #include <linux/mutex.h>
  19
  20 #define DoC_Sig1 0
  21 #define DoC_Sig2 1
  22
  23 #define DoC_ChipID              0x1000
  24 #define DoC_DOCStatus           0x1001
  25 #define DoC_DOCControl          0x1002
  26 #define DoC_FloorSelect         0x1003
  27 #define DoC_CDSNControl         0x1004
  28 #define DoC_CDSNDeviceSelect    0x1005
  29 #define DoC_ECCConf             0x1006
  30 #define DoC_2k_ECCStatus        0x1007
  31
  32 #define DoC_CDSNSlowIO          0x100d
  33 #define DoC_ECCSyndrome0        0x1010
  34 #define DoC_ECCSyndrome1        0x1011
  35 #define DoC_ECCSyndrome2        0x1012
  36 #define DoC_ECCSyndrome3        0x1013
  37 #define DoC_ECCSyndrome4        0x1014
  38 #define DoC_ECCSyndrome5        0x1015
  39 #define DoC_AliasResolution     0x101b
  40 #define DoC_ConfigInput         0x101c
  41 #define DoC_ReadPipeInit        0x101d
  42 #define DoC_WritePipeTerm       0x101e
  43 #define DoC_LastDataRead        0x101f
  44 #define DoC_NOP                 0x1020
  45
  46 #define DoC_Mil_CDSN_IO         0x0800
  47 #define DoC_2k_CDSN_IO          0x1800
  48
  49 #define DoC_Mplus_NOP                   0x1002
  50 #define DoC_Mplus_AliasResolution       0x1004
  51 #define DoC_Mplus_DOCControl            0x1006
  52 #define DoC_Mplus_AccessStatus          0x1008
  53 #define DoC_Mplus_DeviceSelect          0x1008
  54 #define DoC_Mplus_Configuration         0x100a
  55 #define DoC_Mplus_OutputControl         0x100c
  56 #define DoC_Mplus_FlashControl          0x1020
  57 #define DoC_Mplus_FlashSelect           0x1022
  58 #define DoC_Mplus_FlashCmd              0x1024
  59 #define DoC_Mplus_FlashAddress          0x1026
  60 #define DoC_Mplus_FlashData0            0x1028
  61 #define DoC_Mplus_FlashData1            0x1029
  62 #define DoC_Mplus_ReadPipeInit          0x102a
  63 #define DoC_Mplus_LastDataRead          0x102c
  64 #define DoC_Mplus_LastDataRead1         0x102d
  65 #define DoC_Mplus_WritePipeTerm         0x102e
  66 #define DoC_Mplus_ECCSyndrome0          0x1040
  67 #define DoC_Mplus_ECCSyndrome1          0x1041
  68 #define DoC_Mplus_ECCSyndrome2          0x1042
  69 #define DoC_Mplus_ECCSyndrome3          0x1043
  70 #define DoC_Mplus_ECCSyndrome4          0x1044
  71 #define DoC_Mplus_ECCSyndrome5          0x1045
  72 #define DoC_Mplus_ECCConf               0x1046
  73 #define DoC_Mplus_Toggle                0x1046
  74 #define DoC_Mplus_DownloadStatus        0x1074
  75 #define DoC_Mplus_CtrlConfirm           0x1076
  76 #define DoC_Mplus_Power                 0x1fff
  77
  78 /* How to access the device?
  79  * On ARM, it'll be mmap'd directly with 32-bit wide accesses.
  80  * On PPC, it's mmap'd and 16-bit wide.
  81  * Others use readb/writeb
  82  */
  83 #if defined(__arm__) && !defined(CONFIG_MACH_ESS710) && !defined(CONFIG_MACH_SE5100)
  84 #define ReadDOC_(adr, reg)      ((unsigned char)(*(volatile __u32 *)(((unsigned long)adr)+((reg)<<2))))
  85 #define WriteDOC_(d, adr, reg)  do{ *(volatile __u32 *)(((unsigned long)adr)+((reg)<<2)) = (__u32)d; wmb();} while(0)
  86 #define DOC_IOREMAP_LEN 0x8000
  87 #elif defined(__ppc__)
  88 #define ReadDOC_(adr, reg)      ((unsigned char)(*(volatile __u16 *)(((unsigned long)adr)+((reg)<<1))))
  89 #define WriteDOC_(d, adr, reg)  do{ *(volatile __u16 *)(((unsigned long)adr)+((reg)<<1)) = (__u16)d; wmb();} while(0)
  90 #define DOC_IOREMAP_LEN 0x4000
  91
  92 #elif defined(CONFIG_SH_SECUREEDGE5410)
  93
  94 static inline unsigned char _ReadDOC_(unsigned long adr, int reg)
  95 {
  96         readb((adr ^ 0x04000000) & 0xf4000000); /* read other flash chip */
  97         return(readb(((unsigned long)adr)+(reg)));
  98 }
  99
 100 static inline void _WriteDOC_(unsigned char d, unsigned long adr, int reg)
 101 {
 102         readb((adr ^ 0x04000000) & 0xf4000000); /* read other flash chip */
 103         writeb(d, ((unsigned long)adr) + (reg));
 104 }
 105
 106 #define ReadDOC_(adr, reg) _ReadDOC_((unsigned long)(adr), (int)(reg))
 107 #define WriteDOC_(d, adr, reg) _WriteDOC_((unsigned char)(d), (unsigned long)(adr), (int)(reg))
 108
 109 #define DOC_IOREMAP_LEN 0x2000
 110 #else
 111 #define ReadDOC_(adr, reg)      readb((void __iomem *)(adr) + (reg))
 112 #define WriteDOC_(d, adr, reg)  writeb(d, (void __iomem *)(adr) + (reg))
 113 #define DOC_IOREMAP_LEN 0x2000
 114
 115 #endif
 116
 117 #if defined(__i386__) || defined(__x86_64__)
 118 #define USE_MEMCPY
 119 #endif
 120
 121 /* These are provided to directly use the DoC_xxx defines */
 122 #define ReadDOC(adr, reg)      ReadDOC_(adr,DoC_##reg)
 123 #define WriteDOC(d, adr, reg)  WriteDOC_(d,adr,DoC_##reg)
 124
 125 #define DOC_MODE_RESET          0
 126 #define DOC_MODE_NORMAL         1
 127 #define DOC_MODE_RESERVED1      2
 128 #define DOC_MODE_RESERVED2      3
 129
 130 #define DOC_MODE_CLR_ERR        0x80
 131 #define DOC_MODE_RST_LAT        0x10
 132 #define DOC_MODE_BDECT          0x08
 133 #define DOC_MODE_MDWREN         0x04
 134
 135 #define DOC_ChipID_Doc2k        0x20
 136 #define DOC_ChipID_Doc2kTSOP    0x21    /* internal number for MTD */
 137 #define DOC_ChipID_DocMil       0x30
 138 #define DOC_ChipID_DocMilPlus32 0x40
 139 #define DOC_ChipID_DocMilPlus16 0x41
 140
 141 #define CDSN_CTRL_FR_B          0x80
 142 #define CDSN_CTRL_FR_B0         0x40
 143 #define CDSN_CTRL_FR_B1         0x80
 144
 145 #define CDSN_CTRL_ECC_IO        0x20
 146 #define CDSN_CTRL_FLASH_IO      0x10
 147 #define CDSN_CTRL_WP            0x08
 148 #define CDSN_CTRL_ALE           0x04
 149 #define CDSN_CTRL_CLE           0x02
 150 #define CDSN_CTRL_CE            0x01
 151
 152 #define DOC_ECC_RESET           0
 153 #define DOC_ECC_ERROR           0x80
 154 #define DOC_ECC_RW              0x20
 155 #define DOC_ECC__EN             0x08
 156 #define DOC_TOGGLE_BIT          0x04
 157 #define DOC_ECC_RESV            0x02
 158 #define DOC_ECC_IGNORE          0x01
 159
 160 #define DOC_FLASH_CE            0x80
 161 #define DOC_FLASH_WP            0x40
 162 #define DOC_FLASH_BANK          0x02
 163
 164 /* We have to also set the reserved bit 1 for enable */
 165 #define DOC_ECC_EN (DOC_ECC__EN | DOC_ECC_RESV)
 166 #define DOC_ECC_DIS (DOC_ECC_RESV)
 167
 168 struct Nand {
 169         char floor, chip;
 170         unsigned long curadr;
 171         unsigned char curmode;
 172         /* Also some erase/write/pipeline info when we get that far */
 173 };
 174
 175 #define MAX_FLOORS 4
 176 #define MAX_CHIPS 4
 177
 178 #define MAX_FLOORS_MIL 1
 179 #define MAX_CHIPS_MIL 1
 180
 181 #define MAX_FLOORS_MPLUS 2
 182 #define MAX_CHIPS_MPLUS 1
 183
 184 #define ADDR_COLUMN 1
 185 #define ADDR_PAGE 2
 186 #define ADDR_COLUMN_PAGE 3
 187
 188 struct DiskOnChip {
 189         unsigned long physadr;
 190         void __iomem *virtadr;
 191         unsigned long totlen;
 192         unsigned char ChipID; /* Type of DiskOnChip */
 193         int ioreg;
 194
 195         unsigned long mfr; /* Flash IDs - only one type of flash per device */
 196         unsigned long id;
 197         int chipshift;
 198         char page256;
 199         char pageadrlen;
 200         char interleave; /* Internal interleaving - Millennium Plus style */
 201         unsigned long erasesize;
 202
 203         int curfloor;
 204         int curchip;
 205
 206         int numchips;
 207         struct Nand *chips;
 208         struct mtd_info *nextdoc;
 209         struct mutex lock;
 210 };
 211
 212 int doc_decode_ecc(unsigned char sector[512], unsigned char ecc1[6]);
 213
 214 #endif /* __MTD_DOC2000_H__ */