From cef6872b6741dac4d160d2edb60f498e7a89bfa0 Mon Sep 17 00:00:00 2001 From: jethead71 Date: Mon, 23 Feb 2009 04:33:33 +0000 Subject: [PATCH] PP502x: Improve accuracy of header file. It looks as though DMA channels share the same interrupt enable (tested that 0 and 2 do at least). git-svn-id: svn://svn.rockbox.org/rockbox/trunk@20089 a1c6a512-1295-4272-9138-f99709370657 --- firmware/export/pp5020.h | 10 ++-------- firmware/target/arm/pcm-pp.c | 8 ++++---- 2 files changed, 6 insertions(+), 12 deletions(-) diff --git a/firmware/export/pp5020.h b/firmware/export/pp5020.h index 26d5bbaa5..35fe09c1e 100644 --- a/firmware/export/pp5020.h +++ b/firmware/export/pp5020.h @@ -107,10 +107,7 @@ #define USB_IRQ 20 #define IDE_IRQ 23 #define FIREWIRE_IRQ 25 -#define DMA0_IRQ 26 -#define DMA1_IRQ 27 /* guess */ -#define DMA2_IRQ 28 /* guess */ -#define DMA3_IRQ 29 /* guess */ +#define DMA_IRQ 26 #define HI_IRQ 30 #define GPIO0_IRQ (32+0) /* Ports A..D */ #define GPIO1_IRQ (32+1) /* Ports E..H */ @@ -126,10 +123,7 @@ #define IDE_MASK (1 << IDE_IRQ) #define USB_MASK (1 << USB_IRQ) #define FIREWIRE_MASK (1 << FIREWIRE_IRQ) -#define DMA0_MASK (1 << DMA0_IRQ) -#define DMA1_MASK (1 << DMA1_IRQ) -#define DMA2_MASK (1 << DMA2_IRQ) -#define DMA3_MASK (1 << DMA3_IRQ) +#define DMA_MASK (1 << DMA_IRQ) #define HI_MASK (1 << HI_IRQ) #define GPIO0_MASK (1 << (GPIO0_IRQ-32)) #define GPIO1_MASK (1 << (GPIO1_IRQ-32)) diff --git a/firmware/target/arm/pcm-pp.c b/firmware/target/arm/pcm-pp.c index f441bb82c..ce30908b0 100644 --- a/firmware/target/arm/pcm-pp.c +++ b/firmware/target/arm/pcm-pp.c @@ -328,7 +328,7 @@ void pcm_play_lock(void) if (++dma_play_data.locked == 1) { #ifdef CPU_PP502x - CPU_INT_DIS = DMA0_MASK; + CPU_INT_DIS = DMA_MASK; #else IIS_IRQTX_REG &= ~IIS_IRQTX; #endif @@ -343,7 +343,7 @@ void pcm_play_unlock(void) if (--dma_play_data.locked == 0 && dma_play_data.state != 0) { #ifdef CPU_PP502x - CPU_INT_EN = DMA0_MASK; + CPU_INT_EN = DMA_MASK; #else IIS_IRQTX_REG |= IIS_IRQTX; #endif @@ -493,8 +493,8 @@ void pcm_play_dma_init(void) #ifdef CPU_PP502x /* Enable DMA controller */ DMA_MASTER_CONTROL |= DMA_MASTER_CONTROL_EN; - /* FIQ priority for DMA0 */ - CPU_INT_PRIORITY |= DMA0_MASK; + /* FIQ priority for DMA */ + CPU_INT_PRIORITY |= DMA_MASK; /* Enable request?? Not setting or clearing everything doesn't seem to * prevent it operating. Perhaps important for reliability (how requests * are handled). */ -- 2.11.4.GIT