Port greylib blitting optimisation to clipv2 and Clip+. Actual speedup can't be measu...
commitbcd24b28e7e8374eac47aaa091bc9d5a5b4028fd
authoramiconn <amiconn@a1c6a512-1295-4272-9138-f99709370657>
Fri, 4 Jun 2010 23:12:33 +0000 (4 23:12 +0000)
committeramiconn <amiconn@a1c6a512-1295-4272-9138-f99709370657>
Fri, 4 Jun 2010 23:12:33 +0000 (4 23:12 +0000)
tree94c25d98224fcf66657960ba9727471ab4239b1e
parentde1b914899d772aa0cae4ccf2286541322ef67cc
Port greylib blitting optimisation to clipv2 and Clip+. Actual speedup can't be measured because something is fishy with the cpu clocking (calculated load is negative??)

git-svn-id: svn://svn.rockbox.org/rockbox/trunk@26562 a1c6a512-1295-4272-9138-f99709370657
firmware/target/arm/as3525/sansa-clipplus/lcd-as-clip-plus.S
firmware/target/arm/as3525/sansa-clipv2/lcd-as-clipv2.S