| commit | 8be7f8d1ed1f5d259a075eb312b71700601ffc53 | |
| author | funman <funman@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 24 Nov 2009 12:05:53 +0000 (24 12:05 +0000) | ||
| committer | funman <funman@a1c6a512-1295-4272-9138-f99709370657> | |
| Tue, 24 Nov 2009 12:05:53 +0000 (24 12:05 +0000) | ||
| tree | 6ef67348cb49fe7fde7aac42c0ba5c0da49874ce | treesnapshot (tar.gz zip) |
| parent | fe89b6c51fc961c12b795bc6b7801982df64835f | commitdiff |
Sansa AMS: VIC_INT_ENABLE register is not a mask
When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)
Thanks to Fred Bauer for spotting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657
When read it returns all enabled interrupt sources
When written it enables interrupt sources for each bit set
So just like VIC_INT_EN_CLEAR, we don't have to read the previous value
before writing to it (VIC_INT_EN_CLEAR is write-only anyway)
Thanks to Fred Bauer for spotting
git-svn-id: svn://svn.rockbox.org/rockbox/trunk@23734 a1c6a512-1295-4272-9138-f99709370657