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Include usb-target.h for usb_remove_int().
[kugel-rb.git] / firmware / target / arm / as3525 / usb-drv-as3525.c
blobaa323a62ae31104dba7edc54015c8054853cffcd
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
9 *
10 * Copyright © 2010 Tobias Diedrich
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
19 *
20 ****************************************************************************/
21
22 #include "system.h"
23 #include "usb.h"
24 #include "usb_drv.h"
25 #include "usb-target.h"
26 #include "as3525.h"
27 #include "clock-target.h"
28 #include "ascodec.h"
29 #include "as3514.h"
30 #include <stdbool.h>
31 #include "panic.h"
32 /*#define LOGF_ENABLE*/
33 #include "logf.h"
34 #include "usb_ch9.h"
35 #include "usb_core.h"
36 #include "string.h"
37
38 #if defined(USE_ROCKBOX_USB)
39
40 #include "usb-drv-as3525.h"
41
42 static struct usb_endpoint endpoints[USB_NUM_EPS][2];
43 static int got_set_configuration = 0;
44 static int usb_enum_timeout = -1;
45
46 /*
47 * dma/setup descriptors and buffers should avoid sharing
48 * a cacheline with other data.
49 * dmadescs may share with each other, since we only access them uncached.
50 */
51 static struct usb_dev_dma_desc dmadescs[USB_NUM_EPS][2] __attribute__((aligned(32)));
52 /* reuse unused EP2 OUT descriptor here */
53 static struct usb_dev_setup_buf *setup_desc = (void*)&dmadescs[2][1];
54
55 #if AS3525_MCLK_SEL != AS3525_CLK_PLLB
56 static inline void usb_enable_pll(void)
57 {
58 CGU_COUNTB = CGU_LOCK_CNT;
59 CGU_PLLB = AS3525_PLLB_SETTING;
60 CGU_PLLBSUP = 0; /* enable PLLB */
61 while(!(CGU_INTCTRL & CGU_PLLB_LOCK)); /* wait until PLLB is locked */
62 }
63
64 static inline void usb_disable_pll(void)
65 {
66 CGU_PLLBSUP = CGU_PLL_POWERDOWN;
67 }
68 #else
69 static inline void usb_enable_pll(void)
70 {
71 }
72
73 static inline void usb_disable_pll(void)
74 {
75 }
76 #endif /* AS3525_MCLK_SEL != AS3525_CLK_PLLB */
77
78 void usb_attach(void)
79 {
80 usb_enable(true);
81 }
82
83 static void usb_tick(void);
84
85 static void usb_phy_on(void)
86 {
87 /* PHY clock */
88 CGU_USB = 1<<5 /* enable */
89 | (CLK_DIV(AS3525_PLLB_FREQ, 48000000) / 2) << 2
90 | 2; /* source = PLLB */
91
92 /* UVDD on */
93 ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) | (1<<4));
94 mdelay(100);
95
96 /* reset */
97 CCU_SRC = CCU_SRC_USB_AHB_EN|CCU_SRC_USB_PHY_EN;
98 CCU_SRL = CCU_SRL_MAGIC_NUMBER;
99 mdelay(1);
100 CCU_SRC = CCU_SRC_USB_AHB_EN;
101 mdelay(1);
102 CCU_SRC = CCU_SRL = 0;
103
104 USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
105 | USB_GPIO_TX_BIT_STUFF_EN
106 | USB_GPIO_XO_ON
107 | USB_GPIO_CLK_SEL10; /* 0x06180000; */
108 }
109
110 static void usb_phy_suspend(void)
111 {
112 USB_GPIO_CSR |= USB_GPIO_ASESSVLD_EXT |
113 USB_GPIO_BSESSVLD_EXT |
114 USB_GPIO_VBUS_VLD_EXT;
115 mdelay(3);
116 USB_GPIO_CSR |= USB_GPIO_VBUS_VLD_EXT_SEL;
117 mdelay(10);
118 }
119
120 static void usb_phy_resume(void)
121 {
122 USB_GPIO_CSR &= ~(USB_GPIO_ASESSVLD_EXT |
123 USB_GPIO_BSESSVLD_EXT |
124 USB_GPIO_VBUS_VLD_EXT);
125 mdelay(3);
126 USB_GPIO_CSR &= ~USB_GPIO_VBUS_VLD_EXT_SEL;
127 mdelay(10);
128 }
129
130 static void setup_desc_init(struct usb_dev_setup_buf *desc)
131 {
132 struct usb_dev_setup_buf *uc_desc = AS3525_UNCACHED_ADDR(desc);
133
134 uc_desc->status = USB_DMA_DESC_BS_HST_RDY;
135 uc_desc->resv = 0xffffffff;
136 uc_desc->data1 = 0xffffffff;
137 uc_desc->data2 = 0xffffffff;
138 }
139
140 static void dma_desc_init(int ep, int dir)
141 {
142 struct usb_dev_dma_desc *desc = &dmadescs[ep][dir];
143 struct usb_dev_dma_desc *uc_desc = AS3525_UNCACHED_ADDR(desc);
144
145 endpoints[ep][dir].uc_desc = uc_desc;
146
147 uc_desc->status = USB_DMA_DESC_BS_DMA_DONE | \
148 USB_DMA_DESC_LAST | \
149 USB_DMA_DESC_ZERO_LEN;
150 uc_desc->resv = 0xffffffff;
151 uc_desc->data_ptr = 0;
152 uc_desc->next_desc = 0;
153 }
154
155 static void reset_endpoints(int init)
156 {
157 int i;
158
159 /*
160 * OUT EP 2 is an alias for OUT EP 0 on this HW!
161 *
162 * Resonates with "3 bidirectional- plus 1 in-endpoints in device mode"
163 * from the datasheet, but why ep2 and not ep3?
164 *
165 * Reserve it here so we will skip over it in request_endpoint().
166 */
167 endpoints[2][1].state |= EP_STATE_ALLOCATED;
168
169 for(i = 0; i < USB_NUM_EPS; i++) {
170 /*
171 * MPS sizes depending on speed:
172 * LS: 8 (control), no bulk available
173 * FS: 64 (control), 64 (bulk)
174 * HS: 64 (control), 512 (bulk)
175 *
176 * We don't need to handle LS since there is no low-speed only
177 * host AFAIK.
178 */
179 int mps = i == 0 ? 64 : (usb_drv_port_speed() ? 512 : 64);
180
181 if (init) {
182 if (endpoints[i][0].state & EP_STATE_BUSY) {
183 if (endpoints[i][0].state & EP_STATE_ASYNC) {
184 endpoints[i][0].rc = -1;
185 wakeup_signal(&endpoints[i][0].complete);
186 } else {
187 usb_core_transfer_complete(i, USB_DIR_IN, -1, 0);
188 }
189 }
190 endpoints[i][0].state = 0;
191 wakeup_init(&endpoints[i][0].complete);
192
193 if (i != 2) { /* Skip the OUT EP0 alias */
194 if (endpoints[i][1].state & EP_STATE_BUSY)
195 usb_core_transfer_complete(i, USB_DIR_OUT, -1, 0);
196 endpoints[i][1].state = 0;
197 wakeup_init(&endpoints[i][1].complete);
198 USB_OEP_SUP_PTR(i) = 0;
199 }
200 }
201
202 dma_desc_init(i, 0);
203 USB_IEP_CTRL (i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK;
204 USB_IEP_MPS (i) = mps; /* in bytes */
205 /* We don't care about the 'IN token received' event */
206 USB_IEP_STS_MASK(i) = USB_EP_STAT_IN; /* OF: 0x840 */
207 USB_IEP_TXFSIZE (i) = mps/2; /* in dwords => mps*2 bytes */
208 USB_IEP_STS (i) = 0xffffffff; /* clear status */
209 USB_IEP_DESC_PTR(i) = 0;
210
211 if (i != 2) { /* Skip the OUT EP0 alias */
212 dma_desc_init(i, 1);
213 USB_OEP_CTRL (i) = USB_EP_CTRL_FLUSH|USB_EP_CTRL_SNAK;
214 USB_OEP_MPS (i) = (mps/2 << 16) | mps;
215 USB_OEP_STS_MASK(i) = USB_EP_STAT_BNA; /* OF: 0x1800 */
216 USB_OEP_RXFR (i) = 0; /* Always 0 in OF trace? */
217 USB_OEP_STS (i) = 0xffffffff; /* clear status */
218 USB_OEP_DESC_PTR(i) = 0;
219 }
220 }
221
222 setup_desc_init(setup_desc);
223 USB_OEP_SUP_PTR(0) = (int)setup_desc;
224 }
225
226 void usb_drv_init(void)
227 {
228 logf("usb_drv_init() !!!!\n");
229
230 usb_enable_pll();
231
232 /* we have external power, so boost cpu */
233 cpu_boost(1);
234
235 /* length regulator: normal operation */
236 ascodec_write(AS3514_CVDD_DCDC3, ascodec_read(AS3514_CVDD_DCDC3) | 1<<2);
237
238 /* AHB part */
239 CGU_PERI |= CGU_USB_CLOCK_ENABLE;
240
241 /* reset AHB */
242 CCU_SRC = CCU_SRC_USB_AHB_EN;
243 CCU_SRL = CCU_SRL_MAGIC_NUMBER;
244 mdelay(1);
245 CCU_SRC = CCU_SRL = 0;
246
247 USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
248 | USB_GPIO_TX_BIT_STUFF_EN
249 | USB_GPIO_XO_ON
250 | USB_GPIO_CLK_SEL10; /* 0x06180000; */
251
252 /* bug workaround according to linux patch */
253 USB_DEV_CFG = (USB_DEV_CFG & ~3) | 1; /* full speed */
254
255 /* enable soft disconnect */
256 USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
257
258 usb_phy_on();
259 usb_phy_suspend();
260 USB_DEV_CTRL |= USB_DEV_CTRL_SOFT_DISCONN;
261
262 /* We don't care about SVC or SOF events */
263 /* Right now we don't handle suspend, so mask those too */
264 USB_DEV_INTR_MASK = USB_DEV_INTR_SVC |
265 USB_DEV_INTR_SOF |
266 USB_DEV_INTR_USB_SUSPEND |
267 USB_DEV_INTR_EARLY_SUSPEND;
268
269 USB_DEV_CFG = USB_DEV_CFG_STAT_ACK |
270 USB_DEV_CFG_UNI_DIR |
271 USB_DEV_CFG_PI_16BIT |
272 USB_DEV_CFG_HS |
273 USB_DEV_CFG_SELF_POWERED |
274 USB_DEV_CFG_CSR_PRG |
275 USB_DEV_CFG_PHY_ERR_DETECT;
276
277 USB_DEV_CTRL = USB_DEV_CTRL_DESC_UPDATE |
278 USB_DEV_CTRL_THRES_ENABLE |
279 USB_DEV_CTRL_BURST_ENABLE |
280 USB_DEV_CTRL_BLEN_8DWORDS |
281 USB_DEV_CTRL_TLEN_8THMAXSIZE;
282
283 USB_DEV_EP_INTR_MASK &= ~((1<<0) | (1<<16)); /* ep 0 */
284
285 reset_endpoints(1);
286
287 /* clear pending interrupts */
288 USB_DEV_EP_INTR = 0xffffffff;
289 USB_DEV_INTR = 0xffffffff;
290
291 VIC_INT_ENABLE = INTERRUPT_USB;
292
293 usb_phy_resume();
294 USB_DEV_CTRL &= ~USB_DEV_CTRL_SOFT_DISCONN;
295
296 USB_GPIO_CSR = USB_GPIO_TX_ENABLE_N
297 | USB_GPIO_TX_BIT_STUFF_EN
298 | USB_GPIO_XO_ON
299 | USB_GPIO_HS_INTR
300 | USB_GPIO_CLK_SEL10; /* 0x06180000; */
301
302 tick_add_task(usb_tick);
303
304 usb_enum_timeout = HZ; /* one second timeout for enumeration */
305 }
306
307 void usb_drv_exit(void)
308 {
309 tick_remove_task(usb_tick);
310 USB_DEV_CTRL |= (1<<10); /* soft disconnect */
311 usb_phy_suspend();
312 /*
313 * mask all interrupts _before_ writing to VIC_INT_EN_CLEAR,
314 * or else the core might latch the interrupt while
315 * the write ot VIC_INT_EN_CLEAR is in the pipeline and
316 * so cause a fake spurious interrupt.
317 */
318 USB_DEV_EP_INTR_MASK = 0xffffffff;
319 USB_DEV_INTR_MASK = 0xffffffff;
320 VIC_INT_EN_CLEAR = INTERRUPT_USB;
321 CGU_USB &= ~(1<<5);
322 CGU_PERI &= ~CGU_USB_CLOCK_ENABLE;
323 /* Disable UVDD generating LDO */
324 ascodec_write(AS3515_USB_UTIL, ascodec_read(AS3515_USB_UTIL) & ~(1<<4));
325 usb_disable_pll();
326 cpu_boost(0);
327 logf("usb_drv_exit() !!!!\n");
328 }
329
330 int usb_drv_port_speed(void)
331 {
332 return (USB_DEV_STS & USB_DEV_STS_MASK_SPD) ? 0 : 1;
333 }
334
335 int usb_drv_request_endpoint(int type, int dir)
336 {
337 int d = dir == USB_DIR_IN ? 0 : 1;
338 int i = 1; /* skip the control EP */
339
340 for(; i < USB_NUM_EPS; i++) {
341 if (endpoints[i][d].state & EP_STATE_ALLOCATED)
342 continue;
343
344 endpoints[i][d].state |= EP_STATE_ALLOCATED;
345
346 if (dir == USB_DIR_IN) {
347 USB_IEP_CTRL(i) = USB_EP_CTRL_FLUSH |
348 USB_EP_CTRL_SNAK |
349 USB_EP_CTRL_ACT |
350 (type << 4);
351 USB_DEV_EP_INTR_MASK &= ~(1<<i);
352 } else {
353 USB_OEP_CTRL(i) = USB_EP_CTRL_FLUSH |
354 USB_EP_CTRL_SNAK |
355 USB_EP_CTRL_ACT |
356 (type << 4);
357 USB_DEV_EP_INTR_MASK &= ~(1<<(16+i));
358 }
359 /* logf("usb_drv_request_endpoint(%d, %d): returning %02x\n", type, dir, i | dir); */
360 return i | dir;
361 }
362
363 logf("usb_drv_request_endpoint(%d, %d): no free endpoint found\n", type, dir);
364 return -1;
365 }
366
367 void usb_drv_release_endpoint(int ep)
368 {
369 int i = ep & 0x7f;
370 int d = ep & USB_DIR_IN ? 0 : 1;
371
372 if (i >= USB_NUM_EPS)
373 return;
374 /*
375 * Check for control EP and ignore it.
376 * Unfortunately the usb core calls
377 * usb_drv_release_endpoint() for ep=0..(USB_NUM_ENDPOINTS-1),
378 * but doesn't request a new control EP after that...
379 */
380 if (i == 0 || /* Don't mask control EP */
381 (i == 2 && d == 1)) /* See reset_endpoints(), EP2_OUT == EP0_OUT */
382 return;
383
384 if (!(endpoints[i][d].state & EP_STATE_ALLOCATED))
385 return;
386
387 /* logf("usb_drv_release_endpoint(%d, %d)\n", i, d); */
388 endpoints[i][d].state = 0;
389 USB_DEV_EP_INTR_MASK |= (1<<(16*d+i));
390 USB_EP_CTRL(i, !d) = USB_EP_CTRL_FLUSH | USB_EP_CTRL_SNAK;
391 }
392
393 void usb_drv_cancel_all_transfers(void)
394 {
395 logf("usb_drv_cancel_all_transfers()\n");
396 return;
397
398 int flags = disable_irq_save();
399 reset_endpoints(0);
400 restore_irq(flags);
401 }
402
403 int usb_drv_recv(int ep, void *ptr, int len)
404 {
405 struct usb_dev_dma_desc *uc_desc = endpoints[ep][1].uc_desc;
406
407 ep &= 0x7f;
408 logf("usb_drv_recv(%d,%x,%d)\n", ep, (int)ptr, len);
409
410 if (len > USB_DMA_DESC_RXTX_BYTES)
411 panicf("usb_recv: len=%d > %d", len, USB_DMA_DESC_RXTX_BYTES);
412
413 if ((int)ptr & 31) {
414 logf("addr %08x not aligned!\n", (int)ptr);
415 }
416
417 endpoints[ep][1].state |= EP_STATE_BUSY;
418 endpoints[ep][1].len = len;
419 endpoints[ep][1].rc = -1;
420 endpoints[ep][1].timeout = current_tick + HZ;
421
422 /* remove data buffer from cache */
423 invalidate_dcache_range(ptr, len);
424
425 /* DMA setup */
426 uc_desc->status = USB_DMA_DESC_BS_HST_RDY |
427 USB_DMA_DESC_LAST |
428 len;
429 if (len == 0) {
430 uc_desc->status |= USB_DMA_DESC_ZERO_LEN;
431 uc_desc->data_ptr = 0;
432 } else {
433 uc_desc->data_ptr = ptr;
434 }
435 USB_OEP_DESC_PTR(ep) = (int)&dmadescs[ep][1];
436 USB_OEP_STS(ep) = USB_EP_STAT_OUT_RCVD; /* clear status */
437
438 /* Make sure receive DMA is on */
439 if (!(USB_DEV_CTRL & USB_DEV_CTRL_RDE)){
440 logf("enabling receive DMA\n");
441 USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
442 if (!(USB_DEV_CTRL & USB_DEV_CTRL_RDE))
443 logf("failed to enable!\n");
444 }
445
446 USB_OEP_CTRL(ep) |= USB_EP_CTRL_CNAK; /* Go! */
447
448 if (USB_OEP_CTRL(ep) & USB_EP_CTRL_NAK) {
449 int i = 0;
450 while (USB_OEP_CTRL(ep) & USB_EP_CTRL_NAK) {
451 USB_OEP_CTRL(ep) |= USB_EP_CTRL_CNAK; /* Go! */
452 i++;
453 }
454 logf("ep%d CNAK needed %d retries CTRL=%x\n", ep, i, (int)USB_OEP_CTRL(ep));
455 }
456
457 return 0;
458 }
459
460 #if defined(LOGF_ENABLE)
461 static char hexbuf[1025];
462 static char hextab[16] = "0123456789abcdef";
463
464 char *make_hex(char *data, int len)
465 {
466 int i;
467 if (!((int)data & 0x40000000))
468 data = AS3525_UNCACHED_ADDR(data); /* don't pollute the cache */
469
470 if (len > 512)
471 len = 512;
472
473 for (i=0; i<len; i++) {
474 hexbuf[2*i ] = hextab[(unsigned char)data[i] >> 4 ];
475 hexbuf[2*i+1] = hextab[(unsigned char)data[i] & 0xf];
476 }
477 hexbuf[2*i] = 0;
478
479 return hexbuf;
480 }
481 #endif
482
483 void ep_send(int ep, void *ptr, int len)
484 {
485 struct usb_dev_dma_desc *uc_desc = endpoints[ep][0].uc_desc;
486
487 endpoints[ep][0].state |= EP_STATE_BUSY;
488 endpoints[ep][0].len = len;
489 endpoints[ep][0].rc = -1;
490 endpoints[ep][0].timeout = current_tick + HZ;
491
492 /* Make sure data is committed to memory */
493 clean_dcache_range(ptr, len);
494
495 logf("xx%s\n", make_hex(ptr, len));
496
497 uc_desc->status = USB_DMA_DESC_BS_HST_RDY |
498 USB_DMA_DESC_LAST |
499 len;
500 if (len == 0)
501 uc_desc->status |= USB_DMA_DESC_ZERO_LEN;
502
503 uc_desc->data_ptr = ptr;
504
505 USB_IEP_DESC_PTR(ep) = (int)&dmadescs[ep][0];
506 USB_IEP_STS(ep) = 0xffffffff; /* clear status */
507 /* start transfer */
508 USB_IEP_CTRL(ep) |= USB_EP_CTRL_CNAK | USB_EP_CTRL_PD;
509 /* HW automatically sets NAK bit later */
510 }
511
512 int usb_drv_send(int ep, void *ptr, int len)
513 {
514 logf("usb_drv_send(%d,%x,%d): ", ep, (int)ptr, len);
515
516 ep &= 0x7f;
517
518 if (ep == 0 && got_set_configuration) {
519 got_set_configuration = 0;
520 if (len != 0)
521 panicf("usb_drv_send: GSC, but len!=0");
522 /* Tell the HW we handled the request */
523 USB_DEV_CTRL |= USB_DEV_CTRL_APCSR_DONE;
524 return 0;
525 }
526
527 ep_send(ep, ptr, len);
528 while (endpoints[ep][0].state & EP_STATE_BUSY)
529 wakeup_wait(&endpoints[ep][0].complete, TIMEOUT_BLOCK);
530
531 return endpoints[ep][0].rc;
532 }
533
534 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
535 {
536 logf("usb_drv_send_nonblocking(%d,%x,%d): ", ep, (int)ptr, len);
537 ep &= 0x7f;
538 endpoints[ep][0].state |= EP_STATE_ASYNC;
539 ep_send(ep, ptr, len);
540 return 0;
541 }
542
543 static void handle_in_ep(int ep)
544 {
545 int ep_sts = USB_IEP_STS(ep) & ~USB_IEP_STS_MASK(ep);
546
547 if (ep > 3)
548 panicf("in_ep > 3?!");
549
550 USB_IEP_STS(ep) = ep_sts; /* ack */
551
552 if (ep_sts & USB_EP_STAT_BNA) { /* Buffer was not set up */
553 int ctrl = USB_IEP_CTRL(ep);
554 logf("ep%d IN, status %x ctrl %x (BNA)\n", ep, ep_sts, ctrl);
555 panicf("ep%d IN 0x%x 0x%x (BNA)", ep, ep_sts, ctrl);
556 }
557
558 if (ep_sts & USB_EP_STAT_TDC) {
559 endpoints[ep][0].state &= ~EP_STATE_BUSY;
560 endpoints[ep][0].rc = 0;
561 logf("EP%d %x %stx done len %x stat %08x\n",
562 ep, ep_sts, endpoints[ep][0].state & EP_STATE_ASYNC ? "async " :"",
563 endpoints[ep][0].len,
564 endpoints[ep][0].uc_desc->status);
565 if (endpoints[ep][0].state & EP_STATE_ASYNC) {
566 endpoints[ep][0].state &= ~EP_STATE_ASYNC;
567 usb_core_transfer_complete(ep, USB_DIR_IN, 0, endpoints[ep][0].len);
568 } else {
569 wakeup_signal(&endpoints[ep][0].complete);
570 }
571 ep_sts &= ~USB_EP_STAT_TDC;
572 }
573
574 if (ep_sts) {
575 logf("ep%d IN, hwstat %lx, epstat %x\n", ep, USB_IEP_STS(ep), endpoints[ep][0].state);
576 panicf("ep%d IN 0x%x", ep, ep_sts);
577 }
578 }
579
580 static void handle_out_ep(int ep)
581 {
582 struct usb_ctrlrequest *req = (void*)AS3525_UNCACHED_ADDR(&setup_desc->data1);
583 int ep_sts = USB_OEP_STS(ep) & ~USB_OEP_STS_MASK(ep);
584
585 if (ep > 3)
586 panicf("out_ep > 3!?");
587
588 USB_OEP_STS(ep) = ep_sts; /* ACK */
589
590 if (ep_sts & USB_EP_STAT_BNA) { /* Buffer was not set up */
591 int ctrl = USB_OEP_CTRL(ep);
592 logf("ep%d OUT, status %x ctrl %x (BNA)\n", ep, ep_sts, ctrl);
593 panicf("ep%d OUT 0x%x 0x%x (BNA)", ep, ep_sts, ctrl);
594 ep_sts &= ~USB_EP_STAT_BNA;
595 }
596
597 if (ep_sts & USB_EP_STAT_OUT_RCVD) {
598 struct usb_dev_dma_desc *uc_desc = endpoints[ep][1].uc_desc;
599 int dma_sts = uc_desc->status;
600 int dma_len = dma_sts & 0xffff;
601
602 if (!(dma_sts & USB_DMA_DESC_ZERO_LEN)) {
603 logf("EP%d OUT token, st:%08x len:%d frm:%x data=%s epstate=%d\n",
604 ep, dma_sts & 0xf8000000, dma_len, (dma_sts >> 16) & 0x7ff,
605 make_hex(uc_desc->data_ptr, dma_len), endpoints[ep][1].state);
606 /*
607 * If parts of the just dmaed range are in cache, dump them now.
608 */
609 dump_dcache_range(uc_desc->data_ptr, dma_len);
610 } else{
611 logf("EP%d OUT token, st:%08x frm:%x (no data)\n", ep,
612 dma_sts & 0xf8000000, (dma_sts >> 16) & 0x7ff);
613 }
614
615 if (endpoints[ep][1].state & EP_STATE_BUSY) {
616 endpoints[ep][1].state &= ~EP_STATE_BUSY;
617 endpoints[ep][1].rc = 0;
618 usb_core_transfer_complete(ep, USB_DIR_OUT, 0, dma_len);
619 } else {
620 logf("EP%d OUT, but no one was listening?\n", ep);
621 }
622
623 USB_OEP_CTRL(ep) |= USB_EP_CTRL_SNAK; /* make sure NAK is set */
624 ep_sts &= ~USB_EP_STAT_OUT_RCVD;
625 }
626
627 if (ep_sts & USB_EP_STAT_SETUP_RCVD) {
628 static struct usb_ctrlrequest req_copy;
629
630 req_copy = *req;
631 logf("t%ld:got SETUP packet: %s type=%d req=%d val=%d ind=%d len=%d\n",
632 current_tick,
633 make_hex((void*)req, 8),
634 req->bRequestType,
635 req->bRequest,
636 req->wValue,
637 req->wIndex,
638 req->wLength);
639
640 usb_core_control_request(&req_copy);
641 setup_desc_init(setup_desc);
642
643 ep_sts &= ~USB_EP_STAT_SETUP_RCVD;
644 }
645
646 if (ep_sts) {
647 logf("ep%d OUT, status %x\n", ep, ep_sts);
648 panicf("ep%d OUT 0x%x", ep, ep_sts);
649 }
650
651 #if 0
652 /* HW automatically disables RDE, re-enable it */
653 /* THEORY: Because we only set up one DMA buffer... */
654 USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
655 #endif
656
657 if (!(USB_DEV_CTRL & USB_DEV_CTRL_RDE)){
658 logf("receive DMA is disabled!\n");
659 //USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
660 }
661 }
662
663 /*
664 * This is a simplified version of the timer based RDE enable from
665 * the Linux amd5536udc.c driver.
666 * We need this because of the following hw issue:
667 * The usb_storage buffer is 63KB, but Linux sends 120KB.
668 * We get the first part, but upon re-enabling receive dma we
669 * get a 'buffer not available' error from the hardware, since
670 * we haven't gotten the next usb_drv_recv() from the stack yet.
671 * It seems the NAK bit is ignored here and the HW tries to dma
672 * the incoming data anyway.
673 * In theory I think the BNA error should be recoverable, but
674 * I haven't figured out how to do that yet and this approach seems
675 * to work for now.
676 */
677 static void usb_tick(void)
678 {
679 static int rde_timer = 0;
680 static int rde_fails = 0;
681 struct usb_endpoint *eps = &endpoints[0][0];
682 int i;
683
684 if (usb_enum_timeout != -1) {
685 /*
686 * If the enum times out it's a charger, drop out of usb mode.
687 */
688 if (usb_enum_timeout-- <= 0)
689 usb_remove_int();
690 }
691
692 for (i=0; i<2*USB_NUM_EPS; i++) {
693 if (!(eps[i].state & EP_STATE_BUSY) ||
694 !TIME_AFTER(current_tick, endpoints[i]))
695 continue;
696
697 /* recv or send timed out */
698 if (eps[i].state & EP_STATE_ASYNC) {
699 eps[i].rc = -1;
700 wakeup_signal(&eps[i].complete);
701 } else {
702 usb_core_transfer_complete(i/2, i&1 ? USB_DIR_OUT : USB_DIR_IN,
703 -1, 0);
704 }
705 eps[i].state &= ~(EP_STATE_BUSY|EP_STATE_ASYNC);
706 }
707
708 if (USB_DEV_CTRL & USB_DEV_CTRL_RDE)
709 return;
710
711 if (!(USB_DEV_STS & USB_DEV_STS_RXF_EMPTY)) {
712 if (rde_timer == 0)
713 logf("usb_tick: fifo got filled\n");
714 rde_timer++;
715 }
716
717 if (rde_timer > 2) {
718 logf("usb_tick: re-enabling RDE\n");
719 USB_DEV_CTRL |= USB_DEV_CTRL_RDE;
720 rde_timer = 0;
721 if (USB_DEV_CTRL & USB_DEV_CTRL_RDE) {
722 rde_fails = 0;
723 } else {
724 rde_fails++;
725 if (rde_fails > 3)
726 panicf("usb_tick: failed to set RDE");
727 }
728 }
729 }
730
731 /* interrupt service routine */
732 void INT_USB(void)
733 {
734 int ep = USB_DEV_EP_INTR & ~USB_DEV_EP_INTR_MASK;
735 int intr = USB_DEV_INTR & ~USB_DEV_INTR_MASK;
736
737 /* ACK interrupt sources */
738 USB_DEV_EP_INTR = ep;
739 USB_DEV_INTR = intr;
740
741 /* Handle endpoint interrupts */
742 while (ep) {
743 int onebit = 31-__builtin_clz(ep);
744
745 if (onebit < 16) handle_in_ep(onebit);
746 else handle_out_ep(onebit-16);
747
748 ep &= ~(1 << onebit);
749 }
750
751 /* Handle general device interrupts */
752 if (intr) {
753 if (intr & USB_DEV_INTR_SET_INTERFACE) {/* SET_INTERFACE received */
754 logf("set interface\n");
755 panicf("set interface");
756 intr &= ~USB_DEV_INTR_SET_INTERFACE;
757 }
758 if (intr & USB_DEV_INTR_SET_CONFIG) {/* SET_CONFIGURATION received */
759 /*
760 * This is handled in HW, we have to fake a request here
761 * for usb_core.
762 */
763 static struct usb_ctrlrequest set_config = {
764 bRequestType: USB_TYPE_STANDARD | USB_RECIP_DEVICE,
765 bRequest: USB_REQ_SET_CONFIGURATION,
766 wValue: 0,
767 wIndex: 0,
768 wLength: 0,
769 };
770
771 logf("set config\n");
772 got_set_configuration = 1;
773
774 set_config.wValue = USB_DEV_STS & USB_DEV_STS_MASK_CFG;
775 usb_core_control_request(&set_config);
776 intr &= ~USB_DEV_INTR_SET_CONFIG;
777 }
778 if (intr & USB_DEV_INTR_EARLY_SUSPEND) {/* idle >3ms detected */
779 logf("usb idle\n");
780 intr &= ~USB_DEV_INTR_EARLY_SUSPEND;
781 }
782 if (intr & USB_DEV_INTR_USB_RESET) {/* usb reset from host? */
783 logf("usb reset\n");
784 reset_endpoints(1);
785 usb_core_bus_reset();
786 intr &= ~USB_DEV_INTR_USB_RESET;
787 }
788 if (intr & USB_DEV_INTR_USB_SUSPEND) {/* suspend req from host? */
789 logf("usb suspend\n");
790 intr &= ~USB_DEV_INTR_USB_SUSPEND;
791 }
792 if (intr & USB_DEV_INTR_SOF) {/* sof received */
793 logf("sof\n");
794 intr &= ~USB_DEV_INTR_SOF;
795 }
796 if (intr & USB_DEV_INTR_SVC) {/* device status changed */
797 logf("svc: %08x otg: %08x\n", (int)USB_DEV_STS, (int)USB_OTG_CSR);
798 intr &= ~USB_DEV_INTR_SVC;
799 }
800 if (intr & USB_DEV_INTR_ENUM_DONE) {/* speed enumeration complete */
801 int spd = USB_DEV_STS & USB_DEV_STS_MASK_SPD; /* Enumerated Speed */
802 usb_enum_timeout = -1;
803
804 logf("speed enum complete: ");
805 if (spd == USB_DEV_STS_SPD_HS) logf("hs\n");
806 if (spd == USB_DEV_STS_SPD_FS) logf("fs\n");
807 if (spd == USB_DEV_STS_SPD_LS) logf("ls\n");
808
809 USB_PHY_EP0_INFO = 0x00200000 |
810 USB_CSR_DIR_OUT |
811 USB_CSR_TYPE_CTL;
812 USB_PHY_EP1_INFO = 0x00200000 |
813 USB_CSR_DIR_IN |
814 USB_CSR_TYPE_CTL;
815 USB_PHY_EP2_INFO = 0x00200001 |
816 USB_CSR_DIR_IN |
817 USB_CSR_TYPE_BULK;
818 USB_PHY_EP3_INFO = 0x00200001 |
819 USB_CSR_DIR_IN |
820 USB_CSR_TYPE_BULK;
821 USB_DEV_CTRL |= USB_DEV_CTRL_APCSR_DONE;
822 USB_IEP_CTRL(0) |= USB_EP_CTRL_ACT;
823 USB_OEP_CTRL(0) |= USB_EP_CTRL_ACT;
824 intr &= ~USB_DEV_INTR_ENUM_DONE;
825 }
826 if (intr & USB_DEV_INTR_MYSTERY) {
827 logf("got mystery dev intr\n");
828 USB_DEV_INTR_MASK |= USB_DEV_INTR_MYSTERY;
829 intr &= ~USB_DEV_INTR_MYSTERY;
830 }
831 if (intr) {
832 logf("usb devirq 0x%x", intr);
833 panicf("usb devirq 0x%x", intr);
834 }
835 }
836 }
837
838 /* (not essential? , not implemented in usb-tcc.c) */
839 void usb_drv_set_test_mode(int mode)
840 {
841 (void)mode;
842 }
843
844 /* handled internally by controller */
845 void usb_drv_set_address(int address)
846 {
847 (void)address;
848 }
849
850 void usb_drv_stall(int ep, bool stall, bool in)
851 {
852 if (stall) USB_EP_CTRL(ep, in) |= USB_EP_CTRL_STALL;
853 else USB_EP_CTRL(ep, in) &= ~USB_EP_CTRL_STALL;
854 }
855
856 bool usb_drv_stalled(int ep, bool in)
857 {
858 return USB_EP_CTRL(ep, in) & USB_EP_CTRL_STALL;
859 }
860
861 #else
862
863 void usb_attach(void)
864 {
865 }
866
867 void usb_drv_init(void)
868 {
869 }
870
871 void usb_drv_exit(void)
872 {
873 }
874
875 int usb_drv_port_speed(void)
876 {
877 return 0;
878 }
879
880 int usb_drv_request_endpoint(int type, int dir)
881 {
882 (void)type;
883 (void)dir;
884
885 return -1;
886 }
887
888 void usb_drv_release_endpoint(int ep)
889 {
890 (void)ep;
891 }
892
893 void usb_drv_cancel_all_transfers(void)
894 {
895 }
896
897 void usb_drv_set_test_mode(int mode)
898 {
899 (void)mode;
900 }
901
902 void usb_drv_set_address(int address)
903 {
904 (void)address;
905 }
906
907 int usb_drv_recv(int ep, void *ptr, int len)
908 {
909 (void)ep;
910 (void)ptr;
911 (void)len;
912
913 return -1;
914 }
915
916 int usb_drv_send(int ep, void *ptr, int len)
917 {
918 (void)ep;
919 (void)ptr;
920 (void)len;
921
922 return -1;
923 }
924
925 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
926 {
927 (void)ep;
928 (void)ptr;
929 (void)len;
930
931 return -1;
932 }
933
934 void usb_drv_stall(int ep, bool stall, bool in)
935 {
936 (void)ep;
937 (void)stall;
938 (void)in;
939 }
940
941 bool usb_drv_stalled(int ep, bool in)
942 {
943 (void)ep;
944 (void)in;
945
946 return 0;
947 }
948
949 #endif
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