sysdeps/unix/sysv/linux/alpha/ioperm.c

   1 /* Copyright (C) 1992, 1996, 1997 Free Software Foundation, Inc.
   2    This file is part of the GNU C Library.
   3    Contributed by David Mosberger.
   4
   5    The GNU C Library is free software; you can redistribute it and/or
   6    modify it under the terms of the GNU Library General Public License as
   7    published by the Free Software Foundation; either version 2 of the
   8    License, or (at your option) any later version.
   9
  10    The GNU C Library is distributed in the hope that it will be useful,
  11    but WITHOUT ANY WARRANTY; without even the implied warranty of
  12    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13    Library General Public License for more details.
  14
  15    You should have received a copy of the GNU Library General Public
  16    License along with the GNU C Library; see the file COPYING.LIB.  If not,
  17    write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
  18    Boston, MA 02111-1307, USA.  */
  19
  20 /* I/O access is restricted to ISA port space (ports 0..65535).
  21    Modern devices hopefully are sane enough not to put any performance
  22    critical registers in i/o space.
  23
  24    On the first call to ioperm() or _sethae(), the entire (E)ISA port
  25    space is mapped into the virtual address space at address io.base.
  26    mprotect() calls are then used to enable/disable access to ports.  Per
  27    page, there are PAGE_SIZE>>IO_SHIFT I/O ports (e.g., 256 ports on a
  28    Low Cost Alpha based system using 8KB pages).
  29
  30    Keep in mind that this code should be able to run in a 32bit address
  31    space.  It is therefore unreasonable to expect mmap'ing the entire
  32    sparse address space would work (e.g., the Low Cost Alpha chip has an
  33    I/O address space that's 512MB large!).  */
  34
  35 #include <errno.h>
  36 #include <fcntl.h>
  37 #include <stdio.h>
  38 #include <stdlib.h>
  39 #include <string.h>
  40 #include <unistd.h>
  41
  42 #include <sys/types.h>
  43 #include <sys/mman.h>
  44
  45 #include <asm/page.h>
  46 #include <asm/system.h>
  47
  48 #define PATH_ALPHA_SYSTYPE      "/etc/alpha_systype"
  49 #define PATH_CPUINFO            "/proc/cpuinfo"
  50
  51 #define MAX_PORT        0x10000
  52 #define vuip            volatile unsigned int *
  53
  54 #define JENSEN_IO_BASE          (0xfffffc0300000000UL)
  55 #define JENSEN_SPARSE_MEM       (0xfffffc0200000000UL)
  56
  57 /*
  58  * With respect to the I/O architecture, APECS and LCA are identical,
  59  * so the following defines apply to LCA as well.
  60  */
  61 #define APECS_IO_BASE           (0xfffffc01c0000000UL)
  62 #define APECS_SPARSE_MEM        (0xfffffc0200000000UL)
  63 #define APECS_DENSE_MEM         (0xfffffc0300000000UL)
  64
  65 #define CIA_IO_BASE             (0xfffffc8580000000UL)
  66 #define CIA_SPARSE_MEM          (0xfffffc8000000000UL)
  67 #define CIA_DENSE_MEM           (0xfffffc8600000000UL)
  68
  69 #define T2_IO_BASE              (0xfffffc03a0000000UL)
  70 #define T2_SPARSE_MEM           (0xfffffc0200000000UL)
  71 #define T2_DENSE_MEM            (0xfffffc03c0000000UL)
  72
  73 typedef enum {
  74   IOSYS_UNKNOWN, IOSYS_JENSEN, IOSYS_APECS, IOSYS_CIA, IOSYS_T2
  75 } iosys_t;
  76
  77 struct ioswtch {
  78   void          (*sethae)(unsigned long int addr);
  79   void          (*outb)(unsigned char b, unsigned long int port);
  80   void          (*outw)(unsigned short b, unsigned long int port);
  81   void          (*outl)(unsigned int b, unsigned long int port);
  82   unsigned int  (*inb)(unsigned long int port);
  83   unsigned int  (*inw)(unsigned long int port);
  84   unsigned int  (*inl)(unsigned long int port);
  85 };
  86
  87 static struct platform {
  88   const char       *name;
  89   int               io_sys;
  90   iosys_t           hae_shift;
  91   unsigned long int bus_memory_base;
  92   unsigned long int sparse_bus_memory_base;
  93 } platform[] = {
  94   {"Alcor",     IOSYS_CIA,      5, CIA_DENSE_MEM,       CIA_SPARSE_MEM},
  95   {"Avanti",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  96   {"Cabriolet", IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  97   {"EB164",     IOSYS_CIA,      5, CIA_DENSE_MEM,       CIA_SPARSE_MEM},
  98   {"EB64+",     IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
  99   {"EB66",      IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 100   {"EB66P",     IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 101   {"Jensen",    IOSYS_JENSEN,   7, 0,                   JENSEN_SPARSE_MEM},
 102   {"Mikasa",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 103   {"Mustang",   IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 104   {"Noname",    IOSYS_APECS,    5, APECS_DENSE_MEM,     APECS_SPARSE_MEM},
 105   {"Sable",     IOSYS_T2,       5, T2_DENSE_MEM,        T2_SPARSE_MEM},
 106 };
 107
 108
 109 static struct {
 110   struct hae {
 111     unsigned long int   cache;
 112     unsigned long int * reg;
 113   } hae;
 114   unsigned long int     base;
 115   struct ioswtch *      swp;
 116   unsigned long int     bus_memory_base;
 117   unsigned long int     sparse_bus_memory_base;
 118   unsigned long int     io_base;
 119   iosys_t               sys;
 120   int                   hae_shift;
 121 } io;
 122
 123 extern void __sethae (unsigned long int);       /* we can't use asm/io.h */
 124
 125
 126 static inline unsigned long int
 127 port_to_cpu_addr (unsigned long int port, iosys_t iosys, int size)
 128 {
 129   if (iosys == IOSYS_JENSEN)
 130     return (port << 7) + ((size - 1) << 5) + io.base;
 131   else
 132     return (port << 5) + ((size - 1) << 3) + io.base;
 133 }
 134
 135
 136 static inline void
 137 inline_sethae (unsigned long int addr, iosys_t iosys)
 138 {
 139   if (iosys == IOSYS_JENSEN)
 140     {
 141       /* hae on the Jensen is bits 31:25 shifted right */
 142       addr >>= 25;
 143       if (addr != io.hae.cache)
 144         {
 145           __sethae (addr);
 146           io.hae.cache = addr;
 147         }
 148     }
 149   else
 150     {
 151       unsigned long int msb;
 152
 153       /* no need to set hae if msb is 0: */
 154       msb = addr & 0xf8000000;
 155       if (msb && msb != io.hae.cache)
 156         {
 157           __sethae (msb);
 158           io.hae.cache = msb;
 159         }
 160     }
 161 }
 162
 163
 164 static inline void
 165 inline_outb (unsigned char b, unsigned long int port, iosys_t iosys)
 166 {
 167   unsigned int w;
 168   unsigned long int addr = port_to_cpu_addr (port, iosys, 1);
 169
 170   inline_sethae (0, iosys);
 171   asm ("insbl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
 172   *(vuip)addr = w;
 173   mb ();
 174 }
 175
 176
 177 static inline void
 178 inline_outw (unsigned short int b, unsigned long int port, iosys_t iosys)
 179 {
 180   unsigned int w;
 181   unsigned long int addr = port_to_cpu_addr (port, iosys, 2);
 182
 183   inline_sethae (0, iosys);
 184   asm ("inswl %2,%1,%0" : "r=" (w) : "ri" (port & 0x3), "r" (b));
 185   *(vuip)addr = w;
 186   mb ();
 187 }
 188
 189
 190 static inline void
 191 inline_outl (unsigned int b, unsigned long int port, iosys_t iosys)
 192 {
 193   unsigned long int addr = port_to_cpu_addr (port, iosys, 4);
 194
 195   if (port >= MAX_PORT)
 196     return;
 197
 198   inline_sethae (0, iosys);
 199   *(vuip)addr = b;
 200   mb ();
 201 }
 202
 203
 204 static inline unsigned int
 205 inline_inb (unsigned long int port, iosys_t iosys)
 206 {
 207   unsigned long int result, addr = port_to_cpu_addr (port, iosys, 1);
 208
 209   inline_sethae (0, iosys);
 210   result = *(vuip) addr;
 211   result >>= (port & 3) * 8;
 212   return 0xffUL & result;
 213 }
 214
 215
 216 static inline unsigned int
 217 inline_inw (unsigned long int port, iosys_t iosys)
 218 {
 219   unsigned long int result, addr = port_to_cpu_addr (port, iosys, 2);
 220
 221   inline_sethae (0, iosys);
 222   result = *(vuip) addr;
 223   result >>= (port & 3) * 8;
 224   return 0xffffUL & result;
 225 }
 226
 227
 228 static inline unsigned int
 229 inline_inl (unsigned long int port, iosys_t iosys)
 230 {
 231   unsigned long int addr = port_to_cpu_addr (port, iosys, 4);
 232
 233   inline_sethae (0, iosys);
 234   return *(vuip) addr;
 235 }
 236
 237
 238 #define DCL_SETHAE(name, iosys)                 \
 239 static void                                             \
 240 name##_sethae (unsigned long int addr)                  \
 241 {                                                       \
 242   inline_sethae (addr, IOSYS_##iosys);                  \
 243 }
 244
 245 #define DCL_OUT(name, func, type, iosys)                \
 246 static void                                             \
 247 name##_##func (unsigned type b, unsigned long int addr) \
 248 {                                                       \
 249   inline_##func (b, addr, IOSYS_##iosys);               \
 250 }
 251
 252
 253 #define DCL_IN(name, func, iosys)                       \
 254 static unsigned int                                     \
 255 name##_##func (unsigned long int addr)                  \
 256 {                                                       \
 257   return inline_##func (addr, IOSYS_##iosys);           \
 258 }
 259
 260
 261 DCL_SETHAE(jensen, JENSEN)
 262 DCL_OUT(jensen, outb, char,  JENSEN)
 263 DCL_OUT(jensen, outw, short int, JENSEN)
 264 DCL_OUT(jensen, outl, int,   JENSEN)
 265 DCL_IN(jensen, inb, JENSEN)
 266 DCL_IN(jensen, inw, JENSEN)
 267 DCL_IN(jensen, inl, JENSEN)
 268
 269 /* The APECS functions are also used for CIA since they are
 270    identical.  */
 271
 272 DCL_SETHAE(apecs, APECS)
 273 DCL_OUT(apecs, outb, char,  APECS)
 274 DCL_OUT(apecs, outw, short int, APECS)
 275 DCL_OUT(apecs, outl, int,   APECS)
 276 DCL_IN(apecs, inb, APECS)
 277 DCL_IN(apecs, inw, APECS)
 278 DCL_IN(apecs, inl, APECS)
 279
 280 struct ioswtch ioswtch[] = {
 281   {
 282     jensen_sethae,
 283     jensen_outb, jensen_outw, jensen_outl,
 284     jensen_inb, jensen_inw, jensen_inl
 285   },
 286   {
 287     apecs_sethae,
 288     apecs_outb, apecs_outw, apecs_outl,
 289     apecs_inb, apecs_inw, apecs_inl
 290   }
 291 };
 292
 293
 294 /*
 295  * Initialize I/O system.  To determine what I/O system we're dealing
 296  * with, we first try to read the value of symlink PATH_ALPHA_SYSTYPE,
 297  * if that fails, we lookup the "system type" field in /proc/cpuinfo.
 298  * If that fails as well, we give up.
 299  *
 300  * If the value received from PATH_ALPHA_SYSTYPE begins with a number,
 301  * assume this is a previously unsupported system and the values encode,
 302  * in order, "<io_base>,<hae_shift>,<dense_base>,<sparse_base>".
 303  */
 304 static int
 305 init_iosys (void)
 306 {
 307   char systype[256];
 308   int i, n;
 309
 310   n = readlink (PATH_ALPHA_SYSTYPE, systype, sizeof (systype) - 1);
 311   if (n > 0)
 312     {
 313       systype[n] = '\0';
 314       if (isdigit (systype[0]))
 315         {
 316           if (sscanf (systype, "%li,%i,%li,%li", &io.io_base, &io.hae_shift,
 317                       &io.bus_memory_base, &io.sparse_bus_memory_base) == 4)
 318             {
 319               io.sys = IOSYS_UNKNOWN;
 320               io.swp = &ioswtch[1];
 321               return 0;
 322             }
 323           /* else we're likely going to fail with the system match below */
 324         }
 325     }
 326   else
 327     {
 328       FILE * fp;
 329
 330       fp = fopen (PATH_CPUINFO, "r");
 331       if (!fp)
 332         return -1;
 333       while ((n = fscanf (fp, "system type : %256[^\n]\n", systype))
 334              != EOF)
 335         {
 336           if (n == 1)
 337             break;
 338           else
 339             fgets (systype, 256, fp);
 340         }
 341       fclose (fp);
 342
 343       if (n == EOF)
 344         {
 345           /* this can happen if the format of /proc/cpuinfo changes...  */
 346           fprintf (stderr,
 347                    "ioperm.init_iosys(): Unable to determine system type.\n"
 348                    "\t(May need " PATH_ALPHA_SYSTYPE " symlink?)\n");
 349           __set_errno (ENODEV);
 350           return -1;
 351         }
 352     }
 353
 354   /* translate systype name into i/o system: */
 355   for (i = 0; i < sizeof (platform) / sizeof (platform[0]); ++i)
 356     {
 357       if (strcmp (platform[i].name, systype) == 0)
 358         {
 359           io.hae_shift = platform[i].hae_shift;
 360           io.bus_memory_base = platform[i].bus_memory_base;
 361           io.sparse_bus_memory_base = platform[i].sparse_bus_memory_base;
 362           io.sys = platform[i].io_sys;
 363           if (io.sys == IOSYS_JENSEN)
 364             io.swp = &ioswtch[0];
 365           else
 366             io.swp = &ioswtch[1];
 367           return 0;
 368         }
 369     }
 370
 371   /* systype is not a know platform name... */
 372   __set_errno (EINVAL);
 373   return -1;
 374 }
 375
 376
 377 int
 378 _ioperm (unsigned long int from, unsigned long int num, int turn_on)
 379 {
 380   unsigned long int addr, len;
 381   int prot;
 382
 383   if (!io.swp && init_iosys () < 0)
 384     return -1;
 385
 386   /* this test isn't as silly as it may look like; consider overflows! */
 387   if (from >= MAX_PORT || from + num > MAX_PORT)
 388     {
 389       __set_errno (EINVAL);
 390       return -1;
 391     }
 392
 393   if (turn_on)
 394     {
 395       if (!io.base)
 396         {
 397           unsigned long int base;
 398           int fd;
 399
 400           io.hae.reg   = 0;             /* not used in user-level */
 401           io.hae.cache = 0;
 402           __sethae (io.hae.cache);      /* synchronize with hw */
 403
 404           fd = open ("/dev/mem", O_RDWR);
 405           if (fd < 0)
 406             return fd;
 407
 408           switch (io.sys)
 409             {
 410             case IOSYS_UNKNOWN: base = io.io_base; break;
 411             case IOSYS_JENSEN:  base = JENSEN_IO_BASE; break;
 412             case IOSYS_APECS:   base = APECS_IO_BASE; break;
 413             case IOSYS_CIA:     base = CIA_IO_BASE; break;
 414             default:
 415               __set_errno (ENODEV);
 416               return -1;
 417             }
 418           addr  = port_to_cpu_addr (from, io.sys, 1);
 419           addr &= PAGE_MASK;
 420           len = port_to_cpu_addr (MAX_PORT, io.sys, 1) - addr;
 421           io.base =
 422             (unsigned long int) __mmap (0, len, PROT_NONE, MAP_SHARED,
 423                                         fd, base);
 424           close (fd);
 425           if ((long) io.base == -1)
 426             return -1;
 427         }
 428       prot = PROT_READ | PROT_WRITE;
 429     }
 430   else
 431     {
 432       if (!io.base)
 433         return 0;       /* never was turned on... */
 434
 435       /* turnoff access to relevant pages: */
 436       prot = PROT_NONE;
 437     }
 438   addr  = port_to_cpu_addr (from, io.sys, 1);
 439   addr &= PAGE_MASK;
 440   len = port_to_cpu_addr (from + num, io.sys, 1) - addr;
 441   return mprotect ((void *) addr, len, prot);
 442 }
 443
 444
 445 int
 446 _iopl (unsigned int level)
 447 {
 448     if (level > 3)
 449       {
 450         __set_errno (EINVAL);
 451         return -1;
 452       }
 453     if (level)
 454       {
 455         return _ioperm (0, MAX_PORT, 1);
 456       }
 457     return 0;
 458 }
 459
 460
 461 void
 462 _sethae (unsigned long int addr)
 463 {
 464   if (!io.swp && init_iosys () < 0)
 465     return;
 466
 467   io.swp->sethae (addr);
 468 }
 469
 470
 471 void
 472 _outb (unsigned char b, unsigned long int port)
 473 {
 474   if (port >= MAX_PORT)
 475     return;
 476
 477   io.swp->outb (b, port);
 478 }
 479
 480
 481 void
 482 _outw (unsigned short b, unsigned long int port)
 483 {
 484   if (port >= MAX_PORT)
 485     return;
 486
 487   io.swp->outw (b, port);
 488 }
 489
 490
 491 void
 492 _outl (unsigned int b, unsigned long int port)
 493 {
 494   if (port >= MAX_PORT)
 495     return;
 496
 497   io.swp->outl (b, port);
 498 }
 499
 500
 501 unsigned int
 502 _inb (unsigned long int port)
 503 {
 504   return io.swp->inb (port);
 505 }
 506
 507
 508 unsigned int
 509 _inw (unsigned long int port)
 510 {
 511   return io.swp->inw (port);
 512 }
 513
 514
 515 unsigned int
 516 _inl (unsigned long int port)
 517 {
 518   return io.swp->inl (port);
 519 }
 520
 521
 522 unsigned long int
 523 _bus_base(void)
 524 {
 525   if (!io.swp && init_iosys () < 0)
 526     return -1;
 527   return io.bus_memory_base;
 528 }
 529
 530 unsigned long int
 531 _bus_base_sparse(void)
 532 {
 533   if (!io.swp && init_iosys () < 0)
 534     return -1;
 535   return io.sparse_bus_memory_base;
 536 }
 537
 538 int
 539 _hae_shift(void)
 540 {
 541   if (!io.swp && init_iosys () < 0)
 542     return -1;
 543   return io.hae_shift;
 544 }
 545
 546 weak_alias (_sethae, sethae);
 547 weak_alias (_ioperm, ioperm);
 548 weak_alias (_iopl, iopl);
 549 weak_alias (_inb, inb);
 550 weak_alias (_inw, inw);
 551 weak_alias (_inl, inl);
 552 weak_alias (_outb, outb);
 553 weak_alias (_outw, outw);
 554 weak_alias (_outl, outl);
 555 weak_alias (_bus_base, bus_base);
 556 weak_alias (_bus_base_sparse, bus_base_sparse);
 557 weak_alias (_hae_shift, hae_shift);