From 9374e5d2847d1a358370d1d5c2e12a40207897f3 Mon Sep 17 00:00:00 2001
From: hasso <hasso>
Date: Mon, 17 Sep 2007 11:29:36 +0000
Subject: [PATCH] Add support for Vitesse VSC8601 and Realtek 8211B PHYs.
 Patches are obtained from
 http://www.f.csce.kyushu-u.ac.jp/~shigeaki/software/freebsd-nfe.html with
 little modifications. Vitesse VSC8601 support patch is originally made by Aji
 Tanaka and Realtek 8211B patch by Michael Eisele.

Approved-by: sephe@
---
 sys/dev/netif/mii_layer/ciphy.c     |  6 ++-
 sys/dev/netif/mii_layer/miidevs.h   | 14 ++++--
 sys/dev/netif/mii_layer/rgephy.c    | 99 ++++++++++++++++++++++++++-----------
 sys/dev/netif/mii_layer/rgephyreg.h | 11 ++++-
 4 files changed, 96 insertions(+), 34 deletions(-)

diff --git a/sys/dev/netif/mii_layer/ciphy.c b/sys/dev/netif/mii_layer/ciphy.c
index 349b640529..d2073cc79f 100644
--- a/sys/dev/netif/mii_layer/ciphy.c
+++ b/sys/dev/netif/mii_layer/ciphy.c
@@ -32,7 +32,7 @@
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/dev/mii/ciphy.c,v 1.3 2005/09/30 19:39:27 imp Exp $
- * $DragonFly: src/sys/dev/netif/mii_layer/ciphy.c,v 1.4 2006/12/22 23:26:20 swildner Exp $
+ * $DragonFly: src/sys/dev/netif/mii_layer/ciphy.c,v 1.5 2007/09/17 11:29:36 hasso Exp $
  */
 
 /*
@@ -77,6 +77,7 @@ static const struct mii_phydesc ciphys[] = {
 	MII_PHYDESC(xxCICADA,	CS8201),
 	MII_PHYDESC(xxCICADA,	CS8201A),
 	MII_PHYDESC(xxCICADA,	CS8201B),
+	MII_PHYDESC(VITESSE,	VSC8601),
 	MII_PHYDESC_NULL
 };
 
@@ -385,6 +386,9 @@ ciphy_fixup(struct mii_softc *sc)
 			PHY_CLRBIT(sc, CIPHY_MII_10BTCSR, CIPHY_10BTCSR_ECHO);
 		}
 		break;
+	
+	case MII_MODEL_VITESSE_VSC8601:
+		break;
 
 	default:
 		device_printf(sc->mii_dev,
diff --git a/sys/dev/netif/mii_layer/miidevs.h b/sys/dev/netif/mii_layer/miidevs.h
index a1d50410d2..c72498d61e 100644
--- a/sys/dev/netif/mii_layer/miidevs.h
+++ b/sys/dev/netif/mii_layer/miidevs.h
@@ -1,10 +1,10 @@
-/*	$DragonFly: src/sys/dev/netif/mii_layer/miidevs.h,v 1.11 2007/08/07 11:37:11 sephe Exp $	*/
+/*	$DragonFly: src/sys/dev/netif/mii_layer/miidevs.h,v 1.12 2007/09/17 11:29:36 hasso Exp $	*/
 
 /*
  * THIS FILE AUTOMATICALLY GENERATED.  DO NOT EDIT.
  *
  * generated from:
- *	DragonFly: src/sys/dev/netif/mii_layer/miidevs,v 1.10 2007/05/03 08:31:33 sephe Exp 
+ *	DragonFly: src/sys/dev/netif/mii_layer/miidevs,v 1.12 2007/09/17 11:13:55 hasso Exp 
  */
 /* $FreeBSD: src/sys/dev/mii/miidevs,v 1.4.2.13 2003/07/22 02:12:55 ps Exp $ */
 /*$NetBSD: miidevs,v 1.6 1999/05/14 11:37:30 drochner Exp $*/
@@ -77,6 +77,7 @@
 #define	MII_OUI_XAQTI	0x00e0ae	/* XaQti Corp. */
 #define	MII_OUI_MARVELL	0x005043	/* Marvell Semiconductor */
 #define	MII_OUI_ICPLUS	0x0090c3	/* IC Plus Corp. */
+#define	MII_OUI_VITESSE	0x0001c1	/* Vitesse Semiconductor */
 
 /* in the 79c873, AMD uses another OUI (which matches Davicom!) */
 #define	MII_OUI_xxAMD	0x00606e	/* Advanced Micro Devices */
@@ -103,7 +104,7 @@
 #define	MII_OUI_xxDAVICOM	0x006040	/* Davicom Semiconductor */
 #define	MII_OUI_xxBROADCOM2	0x0050ef	/* Broadcom Corporation */
 
-/* This is the OUI of the gigE PHY in the RealTek 8169S/8110S chips */
+/* This is the OUI of the gigE PHY in the RealTek 8211B/8169S/8110S chips */
 #define	MII_OUI_xxREALTEK	0x000732	/*  */
 
 #define	MII_OUI_xxMARVELL	0x000ac2	/* Marvell Semiconductor */
@@ -258,7 +259,7 @@
 #define	MII_MODEL_REALTEK_RTL8201L	0x0020
 #define	MII_STR_REALTEK_RTL8201L	"RTL8201L 10/100 media interface"
 #define	MII_MODEL_xxREALTEK_RTL8169S	0x0011
-#define	MII_STR_xxREALTEK_RTL8169S	"RTL8169S/8110S media interface"
+#define	MII_STR_xxREALTEK_RTL8169S	"8211B/RTL8169S/8110S media interface"
 #define	MII_MODEL_REALTEK2_RTL8169S	0x0011
 #define	MII_STR_REALTEK2_RTL8169S	"RTL8169S/8110S media interface"
 
@@ -325,3 +326,8 @@
 #define	MII_STR_ICPLUS_IP101	"IP101 10/100 PHY"
 #define	MII_MODEL_ICPLUS_IP1000A	0x0008
 #define	MII_STR_ICPLUS_IP1000A	"IC Plus 10/100/1000 media interface"
+
+/* Vitesse Semiconductor PHYs */
+#define	MII_MODEL_VITESSE_VSC8601	0x0002
+#define	MII_STR_VITESSE_VSC8601	"VSC8601 10/100/1000TX PHY"
+
diff --git a/sys/dev/netif/mii_layer/rgephy.c b/sys/dev/netif/mii_layer/rgephy.c
index e618196877..6cc94edf17 100644
--- a/sys/dev/netif/mii_layer/rgephy.c
+++ b/sys/dev/netif/mii_layer/rgephy.c
@@ -32,11 +32,11 @@
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/dev/mii/rgephy.c,v 1.7 2005/09/30 19:39:27 imp Exp $
- * $DragonFly: src/sys/dev/netif/mii_layer/rgephy.c,v 1.5 2006/12/22 23:26:20 swildner Exp $
+ * $DragonFly: src/sys/dev/netif/mii_layer/rgephy.c,v 1.6 2007/09/17 11:29:36 hasso Exp $
  */
 
 /*
- * Driver for the RealTek 8169S/8110S internal 10/100/1000 PHY.
+ * Driver for the RealTek 8211B/8169S/8110S internal 10/100/1000 PHY.
  */
 
 #include <sys/param.h>
@@ -158,6 +158,7 @@ rgephy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 {
 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
 	int reg, speed, gig;
+	uint16_t id2;
 
 	switch (cmd) {
 	case MII_POLLSTAT:
@@ -278,9 +279,17 @@ setit:
 		 *
 		 * XXX Read the BMSR twice in case it's latched?
 		 */
-		reg = PHY_READ(sc, RE_GMEDIASTAT);
-		if (reg & RE_GMEDIASTAT_LINK)
-			break;
+		id2 = PHY_READ(sc, MII_PHYIDR2);
+
+		if (MII_REV(id2) < 2) {
+			reg = PHY_READ(sc, RE_GMEDIASTAT);
+			if (reg & RE_GMEDIASTAT_LINK)
+				break;
+		} else {
+			reg = PHY_READ(sc, RGEPHY_SR);
+			if (reg & RGEPHY_SR_LINK)
+				break;
+		}
 
 		/*
 		 * Only retry autonegotiation every mii_anegticks seconds.
@@ -319,14 +328,23 @@ rgephy_status(struct mii_softc *sc)
 {
 	struct mii_data *mii = sc->mii_pdata;
 	int bmsr, bmcr;
+	uint16_t id2;
 
 	mii->mii_media_status = IFM_AVALID;
 	mii->mii_media_active = IFM_ETHER;
 
-	bmsr = PHY_READ(sc, RE_GMEDIASTAT);
+	id2 = PHY_READ(sc, MII_PHYIDR2);
+
+	if (MII_REV(id2) < 2) {
+		bmsr = PHY_READ(sc, RE_GMEDIASTAT);
+		if (bmsr & RE_GMEDIASTAT_LINK)
+			mii->mii_media_status |= IFM_ACTIVE;
+	} else {
+		bmsr = PHY_READ(sc, RGEPHY_SR);
+		if (bmsr & RGEPHY_SR_LINK)
+			mii->mii_media_status |= IFM_ACTIVE;
+	}
 
-	if (bmsr & RE_GMEDIASTAT_LINK)
-		mii->mii_media_status |= IFM_ACTIVE;
 	bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
 
 	bmcr = PHY_READ(sc, RGEPHY_MII_BMCR);
@@ -342,28 +360,43 @@ rgephy_status(struct mii_softc *sc)
 		}
 	}
 
-	bmsr = PHY_READ(sc, RE_GMEDIASTAT);
-
-	if (bmsr & RE_GMEDIASTAT_1000MBPS) {
-		mii->mii_media_active |= IFM_1000_T;
-	} else if (bmsr & RE_GMEDIASTAT_100MBPS) {
-		mii->mii_media_active |= IFM_100_TX;
-	} else if (bmsr & RE_GMEDIASTAT_10MBPS) {
-		mii->mii_media_active |= IFM_10_T;
+	if (MII_REV(id2) < 2) {
+		bmsr = PHY_READ(sc, RE_GMEDIASTAT);
+		if (bmsr & RE_GMEDIASTAT_1000MBPS)
+			mii->mii_media_active |= IFM_1000_T;
+		else if (bmsr & RE_GMEDIASTAT_100MBPS)
+			mii->mii_media_active |= IFM_100_TX;
+		else if (bmsr & RE_GMEDIASTAT_10MBPS)
+			mii->mii_media_active |= IFM_10_T;
+		else
+			mii->mii_media_active |= IFM_NONE;
+		if (bmsr & RE_GMEDIASTAT_FDX)
+			mii->mii_media_active |= IFM_FDX;
 	} else {
-		mii->mii_media_active |= IFM_NONE;
-		return;
+		bmsr = PHY_READ(sc, RGEPHY_SR);
+		if (RGEPHY_SR_SPEED(bmsr) == 2)
+			mii->mii_media_active |= IFM_1000_T;
+		else if (RGEPHY_SR_SPEED(bmsr) == 1)
+			mii->mii_media_active |= IFM_100_TX;
+		else if (RGEPHY_SR_SPEED(bmsr) == 0)
+			mii->mii_media_active |= IFM_10_T;
+		else
+			mii->mii_media_active |= IFM_NONE;
+		if (bmsr & RGEPHY_SR_FDX)
+			mii->mii_media_active |= IFM_FDX;
 	}
-
-	if (bmsr & RE_GMEDIASTAT_FDX)
-		mii->mii_media_active |= IFM_FDX;
 }
 
 static int
 rgephy_mii_phy_auto(struct mii_softc *sc)
 {
-	rgephy_loop(sc);
-	rgephy_reset(sc);
+	uint16_t id2;
+
+	id2 = PHY_READ(sc, MII_PHYIDR2);
+	if (MII_REV(id2) < 2) {
+		rgephy_loop(sc);
+		rgephy_reset(sc);
+	}
 
 	PHY_WRITE(sc, RGEPHY_MII_ANAR,
 		  BMSR_MEDIA_TO_ANAR(sc->mii_capabilities) | ANAR_CSMA);
@@ -383,9 +416,13 @@ rgephy_loop(struct mii_softc *sc)
 {
 	uint32_t bmsr;
 	int i;
+	uint16_t id2;
 
-	PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);
-	DELAY(1000);
+	id2 = PHY_READ(sc, MII_PHYIDR2);
+	if (MII_REV(id2) < 2) {
+		PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_PDOWN);
+		DELAY(1000);
+	}
 
 	for (i = 0; i < 15000; i++) {
 		bmsr = PHY_READ(sc, RGEPHY_MII_BMSR);
@@ -465,9 +502,15 @@ rgephy_load_dspcode(struct mii_softc *sc)
 static void
 rgephy_reset(struct mii_softc *sc)
 {
+	uint16_t id2;
+
 	mii_phy_reset(sc);
-	DELAY(1000);
-	PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_AUTOEN);
-	DELAY(1000);
+
+	id2 = PHY_READ(sc, MII_PHYIDR2);
+	if (MII_REV(id2) < 2) {
+		DELAY(1000);
+		PHY_WRITE(sc, RGEPHY_MII_BMCR, RGEPHY_BMCR_AUTOEN);
+		DELAY(1000);
+	}
 	rgephy_load_dspcode(sc);
 }
diff --git a/sys/dev/netif/mii_layer/rgephyreg.h b/sys/dev/netif/mii_layer/rgephyreg.h
index 8fbc4ece5c..4b77c8596d 100644
--- a/sys/dev/netif/mii_layer/rgephyreg.h
+++ b/sys/dev/netif/mii_layer/rgephyreg.h
@@ -30,7 +30,7 @@
  * THE POSSIBILITY OF SUCH DAMAGE.
  *
  * $FreeBSD: src/sys/dev/mii/rgephyreg.h,v 1.2 2005/01/06 01:42:56 imp Exp $
- * $DragonFly: src/sys/dev/netif/mii_layer/rgephyreg.h,v 1.1 2005/12/26 13:36:18 sephe Exp $
+ * $DragonFly: src/sys/dev/netif/mii_layer/rgephyreg.h,v 1.2 2007/09/17 11:29:36 hasso Exp $
  */
 
 #ifndef _DEV_MII_RGEPHYREG_H_
@@ -138,4 +138,13 @@
 #define RGEPHY_EXTSTS_T_FD_CAP	0x2000	/* 1000base-T FD capable */
 #define RGEPHY_EXTSTS_T_HD_CAP	0x1000	/* 1000base-T HD capable */
 
+/* RTL8211B */
+#define RGEPHY_SR		0x11
+#define RGEPHY_SR_CROSSOVER	(1<< 6)
+#define RGEPHY_SR_LINK		(1<<10)
+#define RGEPHY_SR_FDX		(1<<13)
+#define RGEPHY_SR_SPEED(X)	(((X)>>14)&3)
+
+#define RGEPHY_EXT_CR		0x14
+
 #endif /* !_DEV_RGEPHY_MIIREG_H_ */
-- 
2.11.4.GIT