Import 2.3.18pre1
[davej-history.git] / include / asm-arm / dma.h
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1 #ifndef __ASM_ARM_DMA_H
2 #define __ASM_ARM_DMA_H
4 typedef unsigned int dmach_t;
6 #include <linux/config.h>
7 #include <linux/kernel.h>
8 #include <linux/spinlock.h>
9 #include <asm/irq.h>
10 #include <asm/arch/dma.h>
13 * DMA modes
15 typedef unsigned int dmamode_t;
17 #define DMA_MODE_MASK 3
19 #define DMA_MODE_READ 0
20 #define DMA_MODE_WRITE 1
21 #define DMA_MODE_CASCADE 2
22 #define DMA_AUTOINIT 4
24 typedef struct {
25 unsigned long address;
26 unsigned long length;
27 } dmasg_t;
29 extern const char dma_str[];
31 extern spinlock_t dma_spin_lock;
33 extern __inline__ unsigned long claim_dma_lock(void)
35 unsigned long flags;
36 spin_lock_irqsave(&dma_spin_lock, flags);
37 return flags;
40 extern __inline__ void release_dma_lock(unsigned long flags)
42 spin_unlock_irqrestore(&dma_spin_lock, flags);
45 /* Clear the 'DMA Pointer Flip Flop'.
46 * Write 0 for LSB/MSB, 1 for MSB/LSB access.
48 * NOTE: This is an architecture specific function, and should
49 * be hidden from the drivers.
51 #define clear_dma_ff(channel)
53 /* Set only the page register bits of the transfer address.
55 * NOTE: This is an architecture specific function, and should
56 * be hidden from the drivers
58 extern __inline__ void set_dma_page(dmach_t channel, char pagenr)
60 printk(dma_str, "set_dma_page", channel);
63 /* Request a DMA channel
65 * Some architectures may need to do allocate an interrupt
67 extern int request_dma(dmach_t channel, const char * device_id);
69 /* Free a DMA channel
71 * Some architectures may need to do free an interrupt
73 extern void free_dma(dmach_t channel);
75 /* Enable DMA for this channel
77 * On some architectures, this may have other side effects like
78 * enabling an interrupt and setting the DMA registers.
80 extern void enable_dma(dmach_t channel);
82 /* Disable DMA for this channel
84 * On some architectures, this may have other side effects like
85 * disabling an interrupt or whatever.
87 extern void disable_dma(dmach_t channel);
89 /* Set the DMA scatter gather list for this channel
91 * This should not be called if a DMA channel is enabled,
92 * especially since some DMA architectures don't update the
93 * DMA address immediately, but defer it to the enable_dma().
95 extern void set_dma_sg(dmach_t channel, dmasg_t *sg, int nr_sg);
97 /* Set the DMA address for this channel
99 * This should not be called if a DMA channel is enabled,
100 * especially since some DMA architectures don't update the
101 * DMA address immediately, but defer it to the enable_dma().
103 extern void set_dma_addr(dmach_t channel, unsigned long physaddr);
105 /* Set the DMA byte count for this channel
107 * This should not be called if a DMA channel is enabled,
108 * especially since some DMA architectures don't update the
109 * DMA count immediately, but defer it to the enable_dma().
111 extern void set_dma_count(dmach_t channel, unsigned long count);
113 /* Set the transfer direction for this channel
115 * This should not be called if a DMA channel is enabled,
116 * especially since some DMA architectures don't update the
117 * DMA transfer direction immediately, but defer it to the
118 * enable_dma().
120 extern void set_dma_mode(dmach_t channel, dmamode_t mode);
122 /* Set the transfer speed for this channel
124 extern void set_dma_speed(dmach_t channel, int cycle_ns);
126 /* Get DMA residue count. After a DMA transfer, this
127 * should return zero. Reading this while a DMA transfer is
128 * still in progress will return unpredictable results.
129 * If called before the channel has been used, it may return 1.
130 * Otherwise, it returns the number of _bytes_ left to transfer.
132 extern int get_dma_residue(dmach_t channel);
134 #ifndef NO_DMA
135 #define NO_DMA 255
136 #endif
138 #ifdef CONFIG_PCI
139 extern int isa_dma_bridge_buggy;
140 #else
141 #define isa_dma_bridge_buggy (0)
142 #endif
144 #endif /* _ARM_DMA_H */