From c17ec146cda789a94f02f3c12de966076b60ce8f Mon Sep 17 00:00:00 2001 From: schulz Date: Sat, 11 Apr 2015 20:35:09 +0000 Subject: [PATCH] Don't enter supervisor mode. Data and instruction synchronization works from user mode too git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@50335 fb15a70f-31f2-0310-bbcc-cdcc74a49acc --- arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c b/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c index 277cc50de1..5ea867868d 100644 --- a/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c +++ b/arch/arm-native/soc/broadcom/2708/mbox/mbox_init.c @@ -61,7 +61,7 @@ AROS_LH2(volatile unsigned int *, MBoxRead, while(1) { ObtainSemaphore(&MBoxBase->mbox_Sem); - APTR ssp = SuperState(); + while ((MBoxStatus(mb) & VCMB_STATUS_READREADY) != 0) { /* Data synchronization barrier */ @@ -77,7 +77,7 @@ AROS_LH2(volatile unsigned int *, MBoxRead, msg = *((volatile unsigned int *)(mb + VCMB_READ)); asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) ); - UserState(ssp); + ReleaseSemaphore(&MBoxBase->mbox_Sem); if ((msg & VCMB_CHAN_MASK) == chan) @@ -102,7 +102,7 @@ AROS_LH3(void, MBoxWrite, if ((((unsigned int)msg & VCMB_CHAN_MASK) == 0) && (chan <= VCMB_CHAN_MAX)) { ObtainSemaphore(&MBoxBase->mbox_Sem); - APTR ssp = SuperState(); + while ((MBoxStatus(mb) & VCMB_STATUS_WRITEREADY) != 0) { /* Data synchronization barrier */ @@ -112,7 +112,7 @@ AROS_LH3(void, MBoxWrite, asm volatile ("mcr p15, 0, %[r], c7, c10, 5" : : [r] "r" (0) ); *((volatile unsigned int *)(mb + VCMB_WRITE)) = ((unsigned int)msg | chan); - UserState(ssp); + ReleaseSemaphore(&MBoxBase->mbox_Sem); } -- 2.11.4.GIT