From 5bbdd3050255c27543dc0790f0303e1a53abb90c Mon Sep 17 00:00:00 2001
From: schulz <schulz@fb15a70f-31f2-0310-bbcc-cdcc74a49acc>
Date: Thu, 30 Apr 2015 18:53:22 +0000
Subject: [PATCH] 1. Enable only one mailbox as FIQ source. Add some functions
 to send IPIs

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@50541 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
---
 arch/arm-native/kernel/kernel_arm.h       |  5 +++++
 arch/arm-native/kernel/kernel_cpu.h       | 25 +++++++++++++++++++++++++
 arch/arm-native/kernel/platform_bcm2708.c | 15 ++++++++++++++-
 3 files changed, 44 insertions(+), 1 deletion(-)

diff --git a/arch/arm-native/kernel/kernel_arm.h b/arch/arm-native/kernel/kernel_arm.h
index 91db533e53..9318cb8c55 100644
--- a/arch/arm-native/kernel/kernel_arm.h
+++ b/arch/arm-native/kernel/kernel_arm.h
@@ -1,3 +1,6 @@
+#ifndef __KERNEL_ARM_H
+#define __KERNEL_ARM_H
+
 /*
     Copyright © 2015, The AROS Development Team. All rights reserved.
     $Id$
@@ -8,6 +11,7 @@ struct ARM_Implementation
     IPTR                ARMI_Family;
     IPTR                ARMI_Platform;
     APTR                ARMI_PeripheralBase;
+    void                (*ARMI_SendIPI) (uint32_t, uint32_t); // Sends IPI to processors in mask
     void                (*ARMI_Init) (APTR, APTR); // takes pointers to KernelBase & SysBase as input
     void                (*ARMI_InitCore) (APTR, APTR); // takes pointers to KernelBase & SysBase as input
     APTR                (*ARMI_InitTimer) (APTR); // takes a pointer to KernelBase as input, and returns struct IntrNode
@@ -39,3 +43,4 @@ extern struct ARM_Implementation __arm_arosintern;
 
 
 
+#endif // __KERNEL_ARM_H
diff --git a/arch/arm-native/kernel/kernel_cpu.h b/arch/arm-native/kernel/kernel_cpu.h
index 4202724a3b..90f5837e4e 100644
--- a/arch/arm-native/kernel/kernel_cpu.h
+++ b/arch/arm-native/kernel/kernel_cpu.h
@@ -7,6 +7,7 @@
 #define CPU_ARM_H_
 
 #include <inttypes.h>
+#include "kernel_arm.h"
 
 extern uint32_t __arm_affinitymask;
 
@@ -27,4 +28,28 @@ extern uint32_t __arm_affinitymask;
 
 void cpu_DumpRegs(regs_t *regs);
 
+static inline int GetCPUNumber() {
+    int tmp;
+    asm volatile (" mrc p15, 0, %0, c0, c0, 5 " : "=r" (tmp));
+    return tmp & 3;
+}
+
+static inline void SendIPISelf(uint32_t msg)
+{
+    int cpu = GetCPUNumber();
+    __arm_arosintern.ARMI_SendIPI((msg & 0x0fffffff) | (cpu << 28), 1 << cpu);
+}
+
+static inline void SendIPIOthers(uint32_t msg)
+{
+    int cpu = GetCPUNumber();
+    __arm_arosintern.ARMI_SendIPI((msg & 0x0fffffff) | (cpu << 28), 0xf & ~(1 << cpu));
+}
+
+static inline void SendIPIAll(uint32_t msg)
+{
+    int cpu = GetCPUNumber();
+    __arm_arosintern.ARMI_SendIPI((msg & 0x0fffffff) | (cpu << 28), 0xf);
+}
+
 #endif /* CPU_ARM_H_ */
diff --git a/arch/arm-native/kernel/platform_bcm2708.c b/arch/arm-native/kernel/platform_bcm2708.c
index e329ac5994..9b4060c8e4 100644
--- a/arch/arm-native/kernel/platform_bcm2708.c
+++ b/arch/arm-native/kernel/platform_bcm2708.c
@@ -137,7 +137,7 @@ static void bcm2708_init_core(APTR _kernelBase, APTR _sysBase)
     *((uint32_t *)(BCM2836_MAILBOX3_CLR0 + (16 * (tmp & 0x3)))) = 0xffffffff;
 
     // enable FIQ mailbox interupt
-    *((uint32_t *)(BCM2836_MAILBOX_INT_CTRL0 + (0x4 * (tmp & 0x3)))) = 0xf0;
+    *((uint32_t *)(BCM2836_MAILBOX_INT_CTRL0 + (0x4 * (tmp & 0x3)))) = 0x10;
 }
 
 static unsigned int bcm2807_get_time(void)
@@ -155,6 +155,18 @@ static void bcm2807_irq_init(void)
     *(volatile unsigned int *)GPUIRQ_DIBL1 = ~0;
 }
 
+static void bcm2807_send_ipi(uint32_t msg, uint32_t cpumask)
+{
+    int i = 0;
+    for (i = 0; i < 4; i++)
+    {
+        if (cpumask & (1 << i))
+        {
+            *((uint32_t *)(BCM2836_MAILBOX0_SET0 + (0x10 * i))) = msg;
+        }
+    }
+}
+
 static void bcm2807_irq_enable(int irq)
 {
     int bank = IRQ_BANK(irq);
@@ -401,6 +413,7 @@ static IPTR bcm2708_probe(struct ARM_Implementation *krnARMImpl, struct TagItem
         krnARMImpl->ARMI_PeripheralBase = (APTR)BCM2836_PERIPHYSBASE;
         krnARMImpl->ARMI_InitCore = &bcm2708_init_core;
         krnARMImpl->ARMI_FIQProcess = &bcm2807_fiq_process;
+        krnARMImpl->ARMI_SendIPI = &bcm2807_send_ipi;
     }
     else
         krnARMImpl->ARMI_PeripheralBase = (APTR)BCM2835_PERIPHYSBASE;
-- 
2.11.4.GIT