| commit | a8d0cdecc976342e02c140bea598e3351ef12e42 | |
| author | DizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Mon, 18 Aug 2014 13:37:02 +0000 (18 13:37 +0000) | ||
| committer | DizzyOfCRN <DizzyOfCRN@fb15a70f-31f2-0310-bbcc-cdcc74a49acc> | |
| Mon, 18 Aug 2014 13:37:02 +0000 (18 13:37 +0000) | ||
| tree | 9ef5ad67bc9e20503952ceb30d28523ebc6785a6 | treesnapshot (tar.gz zip) |
| parent | bd506b1be2f5d5b64905823669ecca6e5746ff76 | commitdiff |
We dont seem to be able to trigger our own interrupt yeat, but SATA controller triggers same int as is for one of the USB3.0 controllers. Port register shows a change and that is nice...
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@49477 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@49477 fb15a70f-31f2-0310-bbcc-cdcc74a49acc
| rom/usb/pciusbhc/xhci/pcixhci_controller.c | diffblobblamehistory |