workbench/devs/AHI/Drivers/SB128/pci_aros.c

   1 #define __OOP_NOATTRBASES__
   2
   3 #include <utility/hooks.h>
   4 #include <exec/interrupts.h>
   5 #include <aros/macros.h>
   6 #include <aros/io.h>
   7 #include <oop/oop.h>
   8 #include <hidd/pci.h>
   9 #include <hidd/irq.h>
  10 #include <aros/asmcall.h>
  11
  12 #include <proto/oop.h>
  13
  14 #include "DriverData.h"
  15 #include "pci_wrapper.h"
  16
  17 #include <aros/debug.h>
  18 #define KPrintF kprintf
  19
  20 struct Library *OOPBase;
  21
  22 static OOP_AttrBase __IHidd_PCIDev;
  23 static OOP_Object *pciobj, *irqobj;
  24
  25 static OOP_MethodID mid_RB;
  26 static OOP_MethodID mid_RW;
  27 static OOP_MethodID mid_RL;
  28
  29 static OOP_MethodID mid_WB;
  30 static OOP_MethodID mid_WW;
  31 static OOP_MethodID mid_WL;
  32
  33 static HIDDT_IRQ_Handler inthandler;
  34 static BOOL inthandler_added;
  35
  36 BOOL ahi_pci_init(struct DriverBase* AHIsubBase)
  37 {
  38     OOPBase = OpenLibrary(AROSOOP_NAME, 0);
  39     if (OOPBase)
  40     {
  41         __IHidd_PCIDev = OOP_ObtainAttrBase(IID_Hidd_PCIDevice);
  42         if (__IHidd_PCIDev)
  43         {
  44             pciobj = OOP_NewObject(NULL, CLID_Hidd_PCI, NULL);
  45             irqobj = OOP_NewObject(NULL, CLID_Hidd_IRQ, NULL);
  46
  47             if (pciobj && irqobj)
  48             {
  49                 mid_RB = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_ReadConfigByte);
  50                 mid_RW = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_ReadConfigWord);
  51                 mid_RL = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_ReadConfigLong);
  52
  53                 mid_WB = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_WriteConfigByte);
  54                 mid_WW = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_WriteConfigWord);
  55                 mid_WL = OOP_GetMethodID(IID_Hidd_PCIDevice, moHidd_PCIDevice_WriteConfigLong);
  56
  57                 return TRUE;
  58             }
  59         }
  60     }
  61
  62     return FALSE;
  63 }
  64
  65 void ahi_pci_exit(void)
  66 {
  67     if (irqobj)
  68         OOP_DisposeObject(irqobj);
  69     if (pciobj)
  70         OOP_DisposeObject(pciobj);
  71     if (__IHidd_PCIDev)
  72         OOP_ReleaseAttrBase(IID_Hidd_PCIDevice);
  73     if (OOPBase)
  74         CloseLibrary(OOPBase);
  75 }
  76
  77 struct enum_data
  78 {
  79     OOP_Object *prev_dev;
  80     OOP_Object *found_dev;
  81 };
  82
  83 static AROS_UFH3(void, Enumerator,
  84                  AROS_UFHA(struct Hook *,    hook,   A0),
  85                  AROS_UFHA(OOP_Object *,     device, A2),
  86                  AROS_UFHA(APTR,             msg,    A1))
  87 {
  88     AROS_USERFUNC_INIT
  89
  90     struct enum_data *ed = (struct enum_data *)hook->h_Data;
  91
  92     if ((ed->found_dev == 0) && (device != ed->prev_dev))
  93     {
  94         ed->found_dev = device;
  95     }
  96
  97     AROS_USERFUNC_EXIT
  98 }
  99
 100
 101 APTR ahi_pci_find_device(ULONG vendorid, ULONG deviceid, APTR dev)
 102 {
 103     struct enum_data ed;
 104
 105     struct Hook FindHook =
 106     {
 107       h_Entry:    (HOOKFUNC)Enumerator,
 108       h_Data:       &ed,
 109     };
 110
 111     struct TagItem Reqs[] =
 112     {
 113 #if 0
 114       { tHidd_PCI_Class         , 0x04      }, /* Multimedia */
 115       { tHidd_PCI_SubClass      , 0x01      }, /* Audio */
 116 #endif
 117       { tHidd_PCI_VendorID      , vendorid  },
 118       { tHidd_PCI_ProductID     , deviceid  },
 119       { TAG_DONE                , 0         },
 120     };
 121
 122     struct pHidd_PCI_EnumDevices enummsg =
 123     {
 124       mID:              OOP_GetMethodID(CLID_Hidd_PCI, moHidd_PCI_EnumDevices),
 125       callback: &FindHook,
 126       requirements:     (struct TagItem *)&Reqs,
 127     }, *msg = &enummsg;
 128
 129     ed.prev_dev = (OOP_Object *)dev;
 130     ed.found_dev = 0;
 131
 132     OOP_DoMethod(pciobj, (OOP_Msg)msg);
 133
 134     //KPrintF("ahi_pci_find_device: found_dev = %lx\n", ed.found_dev);
 135
 136     return (APTR)ed.found_dev;
 137 }
 138
 139 ULONG pci_inl(ULONG addr, struct SB128_DATA *card)
 140 {
 141     return LONGIN(card->iobase + addr);
 142 }
 143
 144 UWORD pci_inw(ULONG addr, struct SB128_DATA *card)
 145 {
 146     return WORDIN(card->iobase + addr);
 147 }
 148
 149 UBYTE pci_inb(ULONG addr, struct SB128_DATA *card)
 150 {
 151     return BYTEIN(card->iobase + addr);
 152 }
 153
 154 void pci_outl(ULONG value, ULONG addr, struct SB128_DATA *card)
 155 {
 156     LONGOUT(card->iobase + addr, value);
 157 }
 158
 159 void pci_outw(UWORD value, ULONG addr, struct SB128_DATA *card)
 160 {
 161     WORDOUT(card->iobase + addr, value);
 162 }
 163
 164 void pci_outb(UBYTE value, ULONG addr, struct SB128_DATA *card)
 165 {
 166     BYTEOUT(card->iobase + addr, value);
 167 }
 168
 169 void outb_setbits(UBYTE value, ULONG addr, struct SB128_DATA *card)
 170 {
 171     UBYTE data = pci_inb(addr, card);
 172     data |= value;
 173
 174     pci_outb(data, addr, card);
 175 }
 176
 177
 178 void outb_clearbits(UBYTE value, ULONG addr, struct SB128_DATA *card)
 179 {
 180     UBYTE data = pci_inb(addr, card);
 181     data &= ~value;
 182
 183     pci_outb(data, addr, card);
 184 }
 185
 186
 187 void outw_setbits(UWORD value, ULONG addr, struct SB128_DATA *card)
 188 {
 189     UWORD data = pci_inw(addr, card);
 190     data |= value;
 191
 192     pci_outw(data, addr, card);
 193 }
 194
 195
 196 void outw_clearbits(UWORD value, ULONG addr, struct SB128_DATA *card)
 197 {
 198     UWORD data = pci_inw(addr, card);
 199     data &= ~value;
 200
 201     pci_outw(data, addr, card);
 202 }
 203
 204
 205 void outl_setbits(ULONG value, ULONG addr, struct SB128_DATA *card)
 206 {
 207     ULONG data = pci_inl(addr, card);
 208     data |= value;
 209
 210     pci_outl(data, addr, card);
 211 }
 212
 213
 214 void outl_clearbits(ULONG value, ULONG addr, struct SB128_DATA *card)
 215 {
 216     ULONG data = pci_inl(addr, card);
 217     data &= ~value;
 218
 219     pci_outl(data, addr, card);
 220 }
 221
 222
 223 ULONG inl_config(UBYTE reg, APTR dev)
 224 {
 225     struct pHidd_PCIDevice_ReadConfigLong  msg;
 226
 227     msg.mID = mid_RL;
 228     msg.reg = reg;
 229
 230     return OOP_DoMethod((OOP_Object *)dev, (OOP_Msg)&msg);
 231 }
 232
 233 UWORD inw_config(UBYTE reg, APTR dev)
 234 {
 235     struct pHidd_PCIDevice_ReadConfigWord  msg;
 236
 237     msg.mID = mid_RW;
 238     msg.reg = reg;
 239
 240     return OOP_DoMethod((OOP_Object *)dev, (OOP_Msg)&msg);
 241 }
 242
 243 UBYTE inb_config(UBYTE reg, APTR dev)
 244 {
 245     struct pHidd_PCIDevice_ReadConfigByte  msg;
 246
 247     msg.mID = mid_RB;
 248     msg.reg = reg;
 249
 250     return OOP_DoMethod(dev, (OOP_Msg)&msg);
 251 }
 252
 253 void outl_config(UBYTE reg, ULONG val, APTR dev)
 254 {
 255     struct pHidd_PCIDevice_WriteConfigLong msg;
 256
 257     msg.mID = mid_WL;
 258     msg.reg = reg;
 259     msg.val = val;
 260
 261     OOP_DoMethod((OOP_Object *)dev, (OOP_Msg)&msg);
 262 }
 263
 264 void outw_config(UBYTE reg, UWORD val, APTR dev)
 265 {
 266     struct pHidd_PCIDevice_WriteConfigWord msg;
 267
 268     msg.mID = mid_WW;
 269     msg.reg = reg;
 270     msg.val = val;
 271
 272     OOP_DoMethod((OOP_Object *)dev, (OOP_Msg)&msg);
 273 }
 274
 275 void outb_config(UBYTE reg, UBYTE val, APTR dev)
 276 {
 277     struct pHidd_PCIDevice_WriteConfigByte msg;
 278
 279     msg.mID = mid_WB;
 280     msg.reg = reg;
 281     msg.val = val;
 282
 283     OOP_DoMethod((OOP_Object *)dev, (OOP_Msg)&msg);
 284 }
 285
 286 ULONG ahi_pci_get_irq(APTR dev)
 287 {
 288     IPTR val;
 289
 290     OOP_GetAttr((OOP_Object *)dev, aHidd_PCIDevice_INTLine, &val);
 291
 292     return (ULONG)val;
 293 }
 294
 295 static void interrupt_code(HIDDT_IRQ_Handler *irq, HIDDT_IRQ_HwInfo *hw)
 296 {
 297     struct Interrupt *i = (struct Interrupt *)irq->h_Data;
 298
 299     AROS_UFC3(void, i->is_Code,
 300         AROS_UFCA(APTR, i->is_Data, A1),
 301         AROS_UFCA(APTR, i->is_Code, A5),
 302         AROS_UFCA(struct ExecBase *, SysBase, A6));
 303 }
 304
 305
 306 BOOL ahi_pci_add_intserver(struct Interrupt *i, APTR dev)
 307 {
 308     struct pHidd_IRQ_AddHandler __msg__, *msg = &__msg__;
 309     IPTR val;
 310
 311     OOP_GetAttr((OOP_Object *)dev, aHidd_PCIDevice_INTLine, &val);
 312
 313     inthandler.h_Node.ln_Pri = 1;
 314     inthandler.h_Node.ln_Name = "SB128 IRQ";
 315     inthandler.h_Code = interrupt_code;
 316     inthandler.h_Data = i;
 317
 318     msg->mID = OOP_GetMethodID(CLID_Hidd_IRQ, moHidd_IRQ_AddHandler);
 319     msg->handlerinfo = &inthandler;
 320     msg->id = val;
 321
 322     OOP_DoMethod(irqobj, (OOP_Msg)msg);
 323
 324     inthandler_added = TRUE;
 325
 326     return TRUE;
 327 }
 328
 329 void ahi_pci_rem_intserver(struct Interrupt *i, APTR dev)
 330 {
 331     if (inthandler_added)
 332     {
 333         struct pHidd_IRQ_RemHandler __msg__ =
 334         {
 335             mID:                    OOP_GetMethodID(CLID_Hidd_IRQ, moHidd_IRQ_RemHandler),
 336             handlerinfo:            &inthandler,
 337         }, *msg = &__msg__;
 338
 339         OOP_DoMethod(irqobj, (OOP_Msg)msg);
 340
 341         inthandler_added = FALSE;
 342     }
 343
 344     KPrintF("ahi_pci_rem_intserver\n");
 345 }
 346
 347
 348 APTR ahi_pci_get_base_address(WORD which, APTR dev)
 349 {
 350     OOP_AttrID attr = 0;
 351     IPTR val = 0;
 352
 353     switch(which)
 354     {
 355         case 0:
 356           attr = aHidd_PCIDevice_Base0;
 357           break;
 358
 359         case 1:
 360           attr = aHidd_PCIDevice_Base1;
 361           break;
 362
 363         case 2:
 364           attr = aHidd_PCIDevice_Base2;
 365           break;
 366
 367         case 3:
 368           attr = aHidd_PCIDevice_Base3;
 369           break;
 370
 371         case 4:
 372           attr = aHidd_PCIDevice_Base4;
 373           break;
 374
 375         case 5:
 376           attr = aHidd_PCIDevice_Base5;
 377           break;
 378
 379         default:
 380           return 0;
 381     }
 382
 383     OOP_GetAttr((OOP_Object *)dev, attr, &val);
 384
 385     //KPrintF("ahi_pci_get_base_address. Result %lx\n", val);
 386
 387     return (APTR)val;
 388 }
 389
 390 ULONG ahi_pci_get_base_size(WORD which, APTR dev)
 391 {
 392     OOP_AttrID attr = 0;
 393     IPTR val = 0;
 394
 395     switch(which)
 396     {
 397         case 0:
 398           attr = aHidd_PCIDevice_Size0;
 399           break;
 400
 401         case 1:
 402           attr = aHidd_PCIDevice_Size1;
 403           break;
 404
 405         case 2:
 406           attr = aHidd_PCIDevice_Size2;
 407           break;
 408
 409         case 3:
 410           attr = aHidd_PCIDevice_Size3;
 411           break;
 412
 413         case 4:
 414           attr = aHidd_PCIDevice_Size4;
 415           break;
 416
 417         case 5:
 418           attr = aHidd_PCIDevice_Size5;
 419           break;
 420
 421         default:
 422           return 0;
 423     }
 424
 425     OOP_GetAttr((OOP_Object *)dev, attr, &val);
 426
 427     //KPrintF("ahi_pci_get_base_size. Result %lx\n", val);
 428
 429     return (ULONG)val;
 430
 431 }
 432
 433
 434
 435 ULONG ahi_pci_get_type(WORD which, APTR dev)
 436 {
 437   OOP_AttrID attr = 0;
 438   IPTR val = 0;
 439
 440   switch(which)
 441   {
 442     case 0:
 443       attr = aHidd_PCIDevice_Type0;
 444       break;
 445
 446     case 1:
 447       attr = aHidd_PCIDevice_Type1;
 448       break;
 449
 450     case 2:
 451       attr = aHidd_PCIDevice_Type2;
 452       break;
 453
 454     case 3:
 455       attr = aHidd_PCIDevice_Type3;
 456       break;
 457
 458     case 4:
 459       attr = aHidd_PCIDevice_Type4;
 460       break;
 461
 462     case 5:
 463       attr = aHidd_PCIDevice_Type5;
 464       break;
 465
 466     default:
 467       return 0;
 468   }
 469
 470   OOP_GetAttr((OOP_Object *)dev, attr, &val);
 471
 472   //KPrintF("ahi_pci_get_type. Result %lx\n", val);
 473
 474   return (ULONG) val;
 475 }