- Interrupt flag in DMA Status register is now cleared after every

 - Interrupt flag in DMA Status register is now cleared after every
   interrupt. This allows more SATA buses to work.
 - Detect which buses are in legacy mode based on PCI Interface byte
   rather than base addresses.
 - Always use legacy IRQ for buses in legacy mode.
 - Use a maximum of two PCI buses in compatiblity mode, as per specs.
 - Disable UDMA modes above 2 if 80-wire cable not detected (SATA should be
   unaffected).
 - Corrected detection of slave devices.
 - Disable DMA if DMA-capability bit is cleared in PCI Interface byte.
 - Corrected detection of available PIO and MDMA modes.
 - Now attempts to use all subclasses of mass storage PCI class except SCSI
   and serial SCSI. Hence removed nosubclass bootloader option and separate
   check for SiI3114/3512.
 - We now handle all interrupts generated during a Packet command.
 - Eliminated known unhandled interrupts.
 - Now reads and discards excess data provided by buggy drive firmwares in
   packet responses, allowing such drives to be used again.
 - Increased timeout in ata_exec_cmd() from 3 seconds to 30 to allow for
   drives that need to spin up before responding.
 - Check ATAPIF_WRITE instead of ATAPIF_READ in ata_IRQPIOWriteAtapi(), which
   should fix PIO ATAPI writes (untested).
 - Removed definitions for invalid PIO and DMA modes.
 - DMADIR bit was opposite of what it should be. Fixed.
 - Warn user about simplex DMA.

git-svn-id: https://svn.aros.org/svn/aros/trunk/AROS@31147 fb15a70f-31f2-0310-bbcc-cdcc74a49acc