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Initial commit
commitf5e34771aaacac0d3c889edb9f1b6ba9f3009252
authorAngel Terrones <angelterrones@gmail.com>
Mon, 1 Jun 2015 03:51:22 +0000 (31 23:21 -0430)
committerAngel Terrones <angelterrones@gmail.com>
Mon, 1 Jun 2015 03:51:22 +0000 (31 23:21 -0430)
tree3aae926987ab256f54013af4b04b31f70113372atree | snapshot (tar.gz zip)
Initial commit
107 files changed:
.gitignore [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/bench/verilog/IS61LV25616AL.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/rtl/verilog/clk_generator/clk_generator.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/rtl/verilog/include/musb_defines.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/rtl/verilog/memory/memory.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/rtl/verilog/memory/memory_bram_dp.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/rtl/verilog/musoc/musoc.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/synthesis/makefile [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/synthesis/scripts/create_bitstream.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/create_project.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/generate_prom_file.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/impact_generate_prom_file.batch [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/impact_program_fpga.batch [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/pinout_musoc.ucf [new file with mode: 0644] blob
Boards/xilinx_diligent_s3/synthesis/scripts/program_fpga.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3/synthesis/scripts/xst_verilog.opt [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/bench/verilog/11512Mb_ddr.zip [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/doc/512Mb_DDR.pdf [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/rtl/verilog/clk_generator/clk_generator.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/rtl/verilog/include/musb_defines.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/rtl/verilog/memory/memory.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/rtl/verilog/memory/memory_bram_dp.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/rtl/verilog/musoc/musoc.v [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/synthesis/makefile [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/create_bitstream.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/create_project.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/generate_prom_file.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/impact_generate_prom_file.batch [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/impact_program_fpga.batch [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/pinout_musoc.ucf [new file with mode: 0644] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/program_fpga.sh [new file with mode: 0755] blob
Boards/xilinx_diligent_s3e/synthesis/scripts/xst_verilog.opt [new file with mode: 0644] blob
Hardware/README.md [new file with mode: 0644] blob
Hardware/arbiter/arbiter.v [new file with mode: 0644] blob
Hardware/clk_generator/clk_generator.v [new file with mode: 0644] blob
Hardware/fifo/fifo.v [new file with mode: 0644] blob
Hardware/gpio/gpio.v [new file with mode: 0644] blob
Hardware/include/musb_defines.v [new file with mode: 0644] blob
Hardware/memory/memory.v [new file with mode: 0644] blob
Hardware/musb/musb_add.v [new file with mode: 0644] blob
Hardware/musb/musb_alu.v [new file with mode: 0644] blob
Hardware/musb/musb_branch_unit.v [new file with mode: 0644] blob
Hardware/musb/musb_control_unit.v [new file with mode: 0644] blob
Hardware/musb/musb_core.v [new file with mode: 0644] blob
Hardware/musb/musb_cpzero.v [new file with mode: 0644] blob
Hardware/musb/musb_div.v [new file with mode: 0644] blob
Hardware/musb/musb_exmem_register.v [new file with mode: 0644] blob
Hardware/musb/musb_hazard_unit.v [new file with mode: 0644] blob
Hardware/musb/musb_idex_register.v [new file with mode: 0644] blob
Hardware/musb/musb_ifid_register.v [new file with mode: 0644] blob
Hardware/musb/musb_load_store_unit.v [new file with mode: 0644] blob
Hardware/musb/musb_memwb_register.v [new file with mode: 0644] blob
Hardware/musb/musb_multiplier.v [new file with mode: 0644] blob
Hardware/musb/musb_mux_2_1.v [new file with mode: 0644] blob
Hardware/musb/musb_mux_4_1.v [new file with mode: 0644] blob
Hardware/musb/musb_pc_register.v [new file with mode: 0644] blob
Hardware/musb/musb_reg_file.v [new file with mode: 0644] blob
Hardware/musb/musb_shifter.v [new file with mode: 0644] blob
Hardware/musoc/musoc.v [new file with mode: 0644] blob
Hardware/mux_switch/mux_switch.v [new file with mode: 0644] blob
Hardware/ram/ram.v [new file with mode: 0644] blob
Hardware/rst_generator/rst_generator.v [new file with mode: 0644] blob
Hardware/uart/uart.v [new file with mode: 0644] blob
Hardware/uart/uart_bootloader.v [new file with mode: 0644] blob
Hardware/uart/uart_clock.v [new file with mode: 0644] blob
Hardware/uart/uart_min.v [new file with mode: 0644] blob
Hardware/uart/uart_rx.v [new file with mode: 0644] blob
Hardware/uart/uart_tx.v [new file with mode: 0644] blob
MITlicense.md [new file with mode: 0644] blob
README.md [new file with mode: 0644] blob
Simulation/README.md [new file with mode: 0644] blob
Simulation/bench/verilog/tb_core.v [new file with mode: 0644] blob
Simulation/bench/verilog/tb_soc.v [new file with mode: 0644] blob
Simulation/bench/verilog/utils/musb_monitor.v [new file with mode: 0644] blob
Simulation/bench/verilog/utils/registers.v [new file with mode: 0644] blob
Simulation/bench/verilog/utils/uart_decoder.v [new file with mode: 0644] blob
Simulation/bench/verilog/utils/uart_send.v [new file with mode: 0644] blob
Simulation/run/makefile [new file with mode: 0644] blob
Simulation/scripts/check_verilog.sh [new file with mode: 0755] blob
Simulation/scripts/compile_asm_test.sh [new file with mode: 0755] blob
Simulation/scripts/create_filelist.sh [new file with mode: 0755] blob
Simulation/scripts/help_screen.sh [new file with mode: 0755] blob
Simulation/scripts/rtlsim.sh [new file with mode: 0755] blob
Simulation/tests/asm/musb-addiu.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-addtest.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-arithtest.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-brtest0.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-brtest1.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-brtest2.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-cloclztest.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-llsctest.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-memexc.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-memtest0.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-memtest1.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-movtest.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-multdiv.s [new file with mode: 0644] blob
Simulation/tests/asm/musb-shifttest.s [new file with mode: 0644] blob
Software/lib/musoc.h [new file with mode: 0644] blob
Software/templates/boot_template [new file with mode: 0644] blob
Software/templates/exception_template [new file with mode: 0644] blob
Software/templates/linker_template [new file with mode: 0644] blob
Software/templates/main_template [new file with mode: 0644] blob
Software/toolchain/README.md [new file with mode: 0644] blob
Software/utils/makefile [new file with mode: 0644] blob
Software/utils/src/bin2hex.c [new file with mode: 0644] blob
Software/utils/src/bin2mem.c [new file with mode: 0644] blob
musb.todo [new file with mode: 0644] blob
MIPS32 Release 1 processor